[CONTRACT] UVM Verification Engineer

microTECH Global Ltd; Cambridge; Hybrid; GBP 40,000 - 70,000; Full time

Job summary

A leading company in the tech sector is seeking a UVM Verification Engineer for a 12-month contract. The role focuses on ASIC verification, combining remote work with occasional on-site collaboration. Successful candidates will contribute to innovative projects and be part of a dynamic new team. Strong expertise in System Verilog and a background in complex designs are essential.

Qualifications

• Strong background in ASIC Verification required.
• Experience with System Verilog and UVM essential.
• Familiarity with C/C++ and Formal Verification is a plus.

Responsibilities

• Join a newly formed team and work on new/existing ASIC projects.
• Engage in verification planning and execution.

Skills

ASIC Verification

System Verilog/UVM

Verification Planning

Complex ASIC Designs

C/C++

Formal Verification

Job description

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[CONTRACT] UVM Verification Engineer, Cambridge

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Client:

microTECH Global Ltd

Location:

Cambridge, United Kingdom

Job Category:

Other

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EU work permit required:

Yes

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Job Reference:

1bfb4ef19bb0

Job Views:

7

Posted:

22.06.2025

Expiry Date:

06.08.2025

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Job Description:

Job Description

Job Title: UVM Verification Engineer
Location: UK/Remote
Duration: 12 months' initial
Start Date: 1st July

A client based in in the UK is looking for a UVM verification Engineer, this will be for an initial 12 month contract with extensions. The role can be performed mainly remotely with up to 50% on-site ideally required.

The successful Verification engineer will be joining a team that is being newly formed within our client's offices and will help to expand on projects being worked, both new and existing within other teams. You will be involved in new and existing ASIC projects.

Skills:
- Strong background in ASIC Verification
- System Verilog/UVM
- SystemVerilog
- Verification Planning
- Used to working with complex ASIC and/or large FPGA designs

Knowledge of some of the following items would be a plus:
- C/C++
- Formal Verification