Systems IP - Staff/Principal Verification Engineer

arm limited; Cambridge; On-site; GBP 60,000 - 90,000; Full time

Job summary

A leading technology company in Cambridge is looking for a Staff/Principal Verification Engineer to join their Systems IP team. This role involves using advanced verification methodologies to enhance the quality and efficiency of hardware development. Candidates should be well-versed in SystemVerilog, UVM, and possess strong software engineering skills. Join their innovative team and influence millions of connected devices worldwide.

Benefits

Opportunities for mentoring

Influencing leading technologies

Building technical leadership skills

Qualifications

• Experience with constrained-random verification and ownership of complex verification environments.
• Understanding of EDA tools and development of verification flows.
• Competent in programming with a sound grasp of software engineering principles.

Responsibilities

• Specify and develop new hardware verification testbenches for future generation hardware IP.
• Improve existing testbenches to increase performance, quality, and efficiency.
• Identify and implement improvements in processes and methodologies for hardware verification.

Skills

SystemVerilog

UVM

Verification Environment

Scripting Skills

Object-Oriented Programming

Data Structures

Algorithms

Job description

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Systems IP - Staff/Principal Verification Engineer, Cambridge

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Client:

arm limited

Location:

Cambridge, United Kingdom

Job Category:

Other

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EU work permit required:

Yes

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Job Reference:

11a90870e6f7

Job Views:

8

Posted:

22.06.2025

Expiry Date:

06.08.2025

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Job Description:

The Role

This position is an excellent opportunity for an experienced and highly motivated verification engineer to join the hardworking System IP team!

This is a fast-paced technical role employing the latest hardware design and verification methodologies to develop complex and highly configurable hardware IP that sit at the heart of Arm-based Systems!

This role is for the Interconnect product team.

The Interconnect team develops the Arm Corelink Interconnect IP family. Our Interconnects and NoCs are designed for intelligent connected systems across a wide range of applications including mobile, IoT, networking infrastructure, automotive etc. The highly scalable IP is optimised for AMBA-compliant SoC connectivity and can be customised for multiple performance points.

Responsibilities:

You will specify and develop new hardware verification testbenches for future generation hardware IP. You will improve existing testbenches to increase performance, quality and efficiency. You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises and state of the art for hardware verification.

The responsibilities of a member of the Verification team are:

• Reviewing and assessing proposed design changes from a verification complexity point of view
• Ownership of verification environment from investigation all the way to verification closure
• Investigating and scripting new verification flows and optimising existing ones
• Analysis of data from simulation runs using machine learning and data science techniques to drive efficient bug discovery and debug
• There will be opportunities for improving our verification methodology and mentoring other members of the team
• Close collaboration with other Arm engineering teams leading to high quality IP that works well in a complete system.

Required Skills and Experience:

• You can demonstrate experience in working with constrained-random verification including ownership of a suitably complex verification environment.
• You have experience of using SystemVerilog and UVM
• Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
• You are familiar with the tools and processes for developing testbenches and finishing all aspects of the verification process.
• You are competent developing verification flows, making the best use of EDA tools and have good scripting skills and are able to plan and estimate your own work.

'Nice To Have' Skills and Experience:

• Team leadership and mentoring experience
• Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols ( AMBA5 CHI, AMBA4 ACE or AXI)
• Experience in Formal Verification testbenches is a plus.
• Strong communication skills and ability to work well as part of a team.
• Dedicated with a focused approach to problem analysis and solving.

In return:

You will get to utilise your engineering skills to build support for the technologies and influence millions of devices for years to come. You will be able to drive and bring your ideas to a wider group of our leading experts, build your technical leadership and influencing skills and build towards becoming an established and recognised expert within the existing team.