AI Hardware FPGA Prototyping Engineer

Commonai C.I.C.; Cambourne; Hybrid; GBP 60.000 - 90.000; Vollzeit

Benefits dieser Stelle

Competitive salary

Pension and benefits

Professional development

Networking opportunities

Office near Cambridge station

Zusammenfassung

CommonAI CIC is seeking an experienced engineer to turn RTL designs into FPGA prototypes and emulation experiments, enabling partners to explore architectural choices. You will adapt RTL, establish repeatable build, bring-up and test workflows, and connect prototype observations to broader simulation studies.

You will work across hardware and software teams, driving practical evaluation of design behavior and performance, while contributing to toolchain and workflow improvements.

Qualifikationen

• Hands-on experience taking RTL through an FPGA prototyping or emulation flow and debugging the resulting system.
• Strong digital-design skills in Verilog, SystemVerilog, VHDL or an equivalent HDL with practical timing and verification judgment.
• Experience with a relevant FPGA or emulation toolchain and the scripting needed to make builds and experiments repeatable.
• Ability to collaborate across hardware and software boundaries and explain conclusions and limitations of a prototype experiment.

Aufgaben

• Adapt and integrate RTL for FPGA prototyping or emulation, working with the design owners and documenting changes needed for the prototype.
• Develop and maintain synthesis, implementation, timing-closure and reproducible build flows for the selected platform.
• Bring up and debug designs, developing tests and instrumentation to check functional behaviour and support repeatable experiments.
• Develop or integrate control, stimulus and data-capture facilities needed for the agreed experiments, working with software colleagues on host interfaces and integration.
• Relate observations from emulation to the model being evaluated, explaining how prototype frequency, interface overheads and other limitations affect interpretation.
• Help assess platform, toolchain and hardware requirements, and document workflows that colleagues and partners can reuse.
• An example early project would be to take a partner's RTL design through FPGA implementation and bring-up, then instrument it to investigate a selected architectural choice and compare observations with a simulator model.

Kenntnisse

RTL prototyping

Verilog/SystemVerilog/VHDL

FPGA toolchain

Scripting for builds

Cross-functional collaboration

AI coding agents experience

Hardware/software collaboration

Tools

FPGA emulation tools

HDL simulators

Design verification tools

Jobbeschreibung

CommonAI CIC is seeking an experienced engineer to turn RTL designs into FPGA prototypes and emulation experiments, enabling partners to explore architectural choices. You will adapt RTL, establish repeatable build, bring-up and test workflows, and connect prototype observations to broader simulation studies.

You will work across hardware and software teams, driving practical evaluation of design behavior and performance, while contributing to toolchain and workflow improvements.