FPGA Prototyping and Emulation Engineer

CommonAI Holdings Ltd; Cambridge; Hybrid; GBP 70,000 - 95,000; Full time

Benefits offered by this job

Pension

Flexible working

Collaborative environment

Job summary

CommonAI CIC is seeking a hands-on RTL/FPGA engineer to turn RTL designs into working prototypes and emulation experiments. You will adapt RTL, develop build and timing-closure flows, and work with hardware and software teams to run repeatable experiments.

You'll bring strong digital design skills in Verilog/SystemVerilog or VHDL, experience with FPGA toolchains, and a pragmatic approach to measurement and model validation.

Qualifications

• Strong digital-design skills with Verilog/SystemVerilog or VHDL.
• Experience with FPGA toolchains and reproducible build flows.
• Hands-on RTL prototyping and emulation experience.
• Ability to collaborate across hardware and software teams.

Responsibilities

• Adapt and integrate RTL for FPGA prototyping or emulation.
• Develop and maintain synthesis, implementation, timing-closure and reproducible build flows.
• Bring up and debug designs with tests and instrumentation.
• Develop control, stimulus and data-capture facilities for experiments.
• Relate prototype observations to model evaluation and explain limitations.
• Assess platform/toolchain/hardware requirements and document reusable workflows.

Skills

Verilog / SystemVerilog

Digital design

Scripting (Python)

Collaboration across HW/SW

AI tooling / agents

VHDL

Tools

FPGA toolchain

Simulation tooling

Job description

About CommonAI

CommonAI CIC is a non-profit organisation built around collaborative engineering and is backed by a mix of UK Government and private funding in order to design, build and deploy innovative AI systems.

Our Scaling Inference Lab (SIL) is developing simulation grounded in real measurements to help the UK invest in promising AI infrastructure. We connect proposed hardware designs to realistic workloads, helping investors and engineers understand their potential, their limitations and the next experiment worth doing.

The Opportunity

Help evaluate proposed AI hardware before it is available as a finished chip. You will turn RTL designs into working FPGA prototypes and emulation experiments, giving SIL and its technology partners a practical way to explore design behaviour and architectural choices.

The initial focus is on RTL prototyping and emulation. You will help choose a useful first design and platform, adapt and integrate the RTL, and establish repeatable build, bring-up and experimental workflows.

Working with our partners and colleagues in software and simulation, you will connect observations from the prototypes to wider system studies. Your work will help establish what the experiments tell us about a proposed design, how those findings relate to simulator models and where further evidence is needed.

What you will do

• Adapt and integrate RTL for FPGA prototyping or emulation, working with the design owners and documenting changes needed for the prototype.
• Develop and maintain synthesis, implementation, timing-closure and reproducible build flows for the selected platform.
• Bring up and debug designs, developing tests and instrumentation to check functional behaviour and support repeatable experiments.
• Develop or integrate the control, stimulus and data-capture facilities needed for the agreed experiments, working with software colleagues on host interfaces and integration.
• Relate observations from emulation to the model being evaluated, explaining how prototype frequency, interface overheads and other limitations affect interpretation.
• Help assess platform, toolchain and hardware requirements, and document workflows that colleagues and partners can reuse.

An example early project would be to take a partner's RTL design through FPGA implementation and bring-up, then instrument it to investigate a selected architectural choice and compare observations with a simulator model.

• Hands-on experience taking RTL through an FPGA prototyping or emulation flow and debugging the resulting system.
• Strong digital-design skills in Verilog, SystemVerilog, VHDL or an equivalent HDL, together with practical timing and verification judgement.
• Experience with a relevant FPGA or emulation toolchain and the scripting needed to make builds and experiments repeatable.
• The ability to collaborate across hardware and software boundaries and explain the conclusions and limitations of a prototype experiment.
• Practical experience using AI coding agents, with the judgement to validate generated HDL, scripts and software.

Why join us

• Help build UK AI capability and improve how investment and compute serve the public good.
• Build a network spanning UK hardware SMEs, major technology companies, venture and public investors, and leading universities.
• Shape a growing team with startup pace and close academic links.
• Use frontier models and coding agents with a substantial tooling budget.

• A collaborative and supportive work environment
• The opportunity to have a high impact in a growing organisation
• Competitive salary package, including pension and benefits
• Professional development opportunities
• Networking opportunities with influential figures from across the tech sector and academia
• A vibrant office environment located a few minutes’ walk away from Cambridge train station

Working with us

Hybrid, with Cambridge attendance agreed individually around collaboration and the work; applicants across the UK are welcome. We are open to permanent employment, part-time arrangements and consultancy. We would like you to start as soon as practical and can be flexible for the right person.

We particularly welcome experienced engineers and can also consider earlier‑career candidates with strong evidence of ability. Relevant postgraduate study is useful, but qualifications are secondary to experience and the quality of your work.

CommonAI CIC is an equal opportunity employer and is committed to creating an inclusive and diverse workplace.