Verification Engineer

Codasip; Villeneuve-Loubet; Sur place; EUR 55 000 - 85 000; Plein temps

Résumé du poste

Codasip is looking for experienced Verification Engineers for their design center in Villeneuve-Loubet, France. The role involves verifying RISC-V processors, developing test benches, and collaborating with engineering teams to deliver verification results.

Candidates should have a strong background in processor verification methodologies and programming skills in languages such as SystemVerilog, Python, and C++. This is an exciting opportunity to impact cutting-edge technology in a collaborative environment.

Qualifications

• Commercial experience with functional processor verification for CPUs or ASICs.
• Knowledge of CPU architectures or other IP verification.
• Past verification ownership of a design block.

Responsabilités

• Verify RISC-V processors and extensions.
• Develop verification solutions like test benches.
• Collaborate with engineers on verification activities from start to finish.
• Define verification strategies for blocks and subsystems.
• Run simulations and conduct root cause analysis.

Connaissances

Functional processor verification methodologies

SystemVerilog

Python

C++

Rust

Go

Linux

Versioning tools (Git, SVN)

RISC-V Architecture

Analytical thinking

Team collaboration

Description du poste

Please note this role is only open to candidates with working rights in France.

Location: Preferably based at our design center in Villeneuve-Loubet.

Seniority: Engineer, Senior, Principal.

Welcome to Codasip. At Codasip, we’re redefining the future of computing. Following a bold strategic pivot toward cyber‑resilient semiconductor architectures, we are building next‑generation processors and systems where security is embedded at the very core by design, not as an afterthought.

We’re looking for Verification Engineers to help bring our vision to life. You’ll be a key part of verifying complex, state‑of‑the‑art CPUs, including advanced out‑of‑order processors. Taking ownership of portions of the design, you’ll apply a range of verification methodologies and play a vital role in setting high standards for a brand‑new platform.

The impact you’ll make

• Verify RISC‑V processors and extensions
• Develop verification solutions (e.g., test benches and test bench components, stimulus generation, formal environments)
• Collaborate with other engineers in a team responsible for the delivery of all verification activities related to a component or subsystem from start to finish
• Define verification strategies for blocks and sub‑systems, identifying and utilising the right tools
• Review technical specifications, providing feedback from a verification perspective
• Run simulations, hunt bugs and complete root cause analysis of complex issues
• Define, estimate, prioritise and track your own work
• Track and report verification metrics
• Craft automated verification flows

What You Bring to the Table

• Commercial experience with functional processor verification methodologies as applied to CPU or other ASIC verification (simulators, test generation, coverage collection, gate‑level simulation, etc.)
• Knowledge of verifying CPU architectures or other IP
• Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go
• Past verification ownership of a design block
• Knowledge of Linux to enable automation of common tasks
• Knowledge of versioning tools (Git, SVN)
• Knowledge of RISC‑V Architecture
• Good knowledge of computer systems and architecture
• Analytical thinking and team collaboration skills
• Ability to work effectively across teams to debug issues and find root causes

Our Design Center in France

Our “à taille humaine” design center in Villeneuve‑Loubet, located near Sophia Antipolis, was launched in 2020 and is Codasip's first international design center. The team works closely with our European design centers to develop high‑performance, low‑power CPU cores entirely from scratch to power some of the most exciting applications—think high‑performance supercomputers and next‑generation embedded systems. This is a unique chance to work on clean‑sheet designs that push technological boundaries and make a real impact.