Senior SoC Architect & RTL Design Engineer

QUALCOMM, Inc.; Grenoble; On-site; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Salary, stock and performance related

Employee stock purchase scheme

Relocation and immigration support

Life, Medical & Travel Insurance

Job summary

Qualcomm France S.A.R.L. in Grenoble seeks an experienced Hardware Engineer to contribute to architecture, micro-architecture, and RTL design of next‑generation SoCs and compute platforms.

You will define SoC architectures, develop CPUs, accelerators, memory, and interconnect solutions, and write high-quality RTL. The role requires 8+ years in SoC architecture and digital design, with expertise in ARM or RISC-V, memory systems, NoC concepts, and industry interfaces (AXI, CHI, DDR, PCIe,

Qualifications

• Bachelor's or higher in a science/engineering field with ASIC/SoC experience.
• 8+ years in SoC architecture and digital design, with RTL work.
• Experience with ARM and/or RISC-V based systems.

Responsibilities

• Define SoC and subsystem architectures and micro-architectures.
• Develop and integrate CPUs, accelerators, memory, and interconnect solutions.
• Write and maintain high-quality RTL.
• Collaborate with architecture, verification, physical design, and software teams.
• Drive design convergence from architecture to silicon.

Skills

SoC architecture

RTL design

ARM/RISC-V

NoC concepts

Memory subsystems

Interface protocols

Front-end flows

Technical leadership

Education

Bachelor's in Science/Engineering

Master's in Science/Engineering

PhD in Science/Engineering

Tools

RTL tools

Simulation tools

Job description

Qualcomm France S.A.R.L. in Grenoble seeks an experienced Hardware Engineer to contribute to architecture, micro-architecture, and RTL design of next‑generation SoCs and compute platforms.

You will define SoC architectures, develop CPUs, accelerators, memory, and interconnect solutions, and write high-quality RTL. The role requires 8+ years in SoC architecture and digital design, with expertise in ARM or RISC-V, memory systems, NoC concepts, and industry interfaces (AXI, CHI, DDR, PCIe,