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Senior ASIC/FPGA Prototyping Engineer R&D (H/F)

Atos

Les Clayes-sous-Bois

Sur place

EUR 60 000 - 80 000

Plein temps

Il y a 18 jours

Résumé du poste

A leading technology firm in Île-de-France is seeking a Senior Engineer to develop and validate advanced ASIC/FPGA components. The ideal candidate will have proven experience in design or integration, strong communication skills, and the ability to work autonomously. This role offers the opportunity to collaborate with a multicultural team on cutting-edge projects in High-Performance Computing.

Qualifications

  • Proven experience in ASIC/FPGA design or integration roles.
  • Fluency in English is essential.
  • Ability to lead a multidisciplinary team.

Responsabilités

  • Lead or participate in root cause analysis for bugs.
  • Contribute to hardware/software test strategy.
  • Define and update test bench configurations.

Connaissances

ASIC/FPGA design
Strong communication skills
Autonomous and creative work

Outils

SystemVerilog RTL
Python
Tcl
Bash

Description du poste

About Eviden

Eviden is a next-gen technology leader in data-driven, trusted and sustainable digital transformation with a strong portfolio of patented technologies. With worldwide leading positions in advanced computing, security, AI, cloud and digital platforms, it provides deep expertise for all industries in more than 47 countries. Bringing together 41,000 world-class talents, Eviden expands the possibilities of data and technology across the digital continuum, now and for generations to come. Eviden is an Atos Group company with an annual revenue of c. € 5 billion.

Join us as a senior engineer with a passion for prototyping and validating advanced ASIC/FPGA components in the fields ofHigh-Performance Computing (HPC) and enterprise servers.

The ideal candidate will be capable of leading a multidisciplinary team in problem-solving, while also contributing individually to root cause analysis of encountered bugs.

The role also requires the ability to drive test coverage analysis and define a test plan based on specification.

Experience in Asic/FPGA and/or integrating complex hardware and software test environments using servers and FPGA boards is highly desirable. This is an excellent opportunity to join a cutting-edge European HPC team collaborating with some of the world’s leading electronics companies. The selected candidate will be encouraged to showcase their skills and eagerness to learn within an already established, multicultural and multidisciplinary team.

Fluency in English is essential. Required profile :

• Proven experience in ASIC/FPGA design or integration roles

• Strong communication skills in technical environments

• Ability to work autonomously, creatively, and proactively

Responsibilities:

• Lead or participate in root cause analysis groups for bugs found during test campaigns

• Contribute to hardware/software test strategy, test coverage analysis, and planning

• Define and update test bench configurations using servers and FPGA boards

• Collaborate closely with hardware, software, and verification teams to define and execute test campaigns

• Propose and implement instrumentation enhancements

• Improvement of test tools using SystemVerilog RTL, Python, Tcl, and Bash will be considered a plus

Let’s grow together.

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