Radar FPGA Engineer: Real-Time DSP for Target Detection

Alta Ares; Paris; On-site; EUR 70,000 - 110,000; Full time

Job summary

Alta Ares in Paris seeks an FPGA Engineer to turn radar sensing requirements into FPGA designs for reliable drone detection in operational conditions. You will define data acquisition, processing, and delivery across RF, electronics and software teams, and build reference models for radar behavior.

You will develop RTL blocks for waveform generation, perform CFAR and range-Doppler processing, and verify designs with testbenches and hardware-in-the-loop.

Qualifications

• Three+ years FPGA development experience in radar or related fields.
• Translate algorithms into verified RTL designs using VHDL/Verilog/SystemVerilog.
• Strong DSP background including FFT, digital filtering and fixed-point precision.
• Understanding radar range and velocity estimation and clutter suppression.
• Experience with testbenches and hardware-in-the-loop validation.
• Master’s degree or equivalent in Electrical Engineering or related field.

Responsibilities

• Turn radar sensing requirements into FPGA designs for reliable detection in operational conditions.
• Define how radar data is acquired, processed, and delivered across RF, electronics, and software teams.
• Establish processing budgets and select implementation approaches based on detection performance and latency.
• Develop reference models to study radar behavior in noise and clutter.
• Build RTL functions for waveform generation and receive processing in FMCW and pulsed radar systems.
• Implement processing stages to extract targets: CFAR detection, range-Doppler processing, and clutter rejection.
• Integrate ADC/DAC interfaces, coordinate timing, and synchronize with the radar front end.
• Specify how detections and measurements are passed to tracking functions and embedded software.
• Verify designs against reference models through testbenches and hardware-in-the-loop testing.
• Investigate performance gaps using laboratory measurements and field results to improve the chain.
• Document design decisions, interfaces, and validation results for integration.

Skills

FPGA development

Radar processing

RTL design

VHDL/Verilog/SystemVerilog

DSP fundamentals

Matched filtering

CFAR techniques

Range-Doppler processing

Education

Master’s degree in Electrical Engineering or related field

Tools

VHDL

Verilog

SystemVerilog

Job description

Alta Ares in Paris seeks an FPGA Engineer to turn radar sensing requirements into FPGA designs for reliable drone detection in operational conditions. You will define data acquisition, processing, and delivery across RF, electronics and software teams, and build reference models for radar behavior.

You will develop RTL blocks for waveform generation, perform CFAR and range-Doppler processing, and verify designs with testbenches and hardware-in-the-loop.