Radar FPGA Engineer for Next-Gen Interceptors

Alta Ares; Paris; On-site; EUR 90,000 - 120,000; Full time

Job summary

Alta Ares seeks an experienced FPGA engineer to translate radar sensing requirements into reliable hardware. You will collaborate with RF, electronics, and software teams to deliver high‑grade radar processing in production hardware.

You will implement RTL, validate with testbenches and hardware‑in‑the‑loop, and document design decisions to support scaling as we expand internationally.

Qualifications

• Master’s degree or equivalent in Electrical Engineering, Signal Processing, or related field.
• 3+ years FPGA development with radar or sonar processing.
• Ability to take a signal-processing function from an algorithmic description to RTL in VHDL/Verilog/SystemVerilog.
• Strong DSP foundations: FFT, digital filtering, windowing, fixed-point precision.
• Understanding of radar systems to estimate range and velocity, CFAR familiarity.

Responsibilities

• Translate radar sensing requirements into FPGA designs that support reliable drone detection.
• Define how radar data is acquired, processed, and delivered to RF, electronics, and software teams.
• Establish processing budgets and select implementation approaches based on performance, latency, and FPGA resources.
• Develop reference models to study radar behavior in noise and clutter and guide hardware decisions.
• Build reusable RTL functions for waveform generation and receive processing in FMCW and pulsed radar systems.
• Implement processing stages to extract targets: matched filtering, pulse compression, range-Doppler processing, clutter rejection, CFAR detection.
• Integrate ADC/DAC interfaces, coordinate timing, and ensure synchronization with the radar front end.
• Specify how detections and measurements are passed to tracking and embedded software.
• Verify designs against reference models via testbenches and hardware-in-the-loop testing.
• Investigate performance gaps on target hardware and use lab measurements and field results to improve the chain.
• Document design decisions, interfaces, and validation results for integration and future product development.

Skills

FPGA development

Radar processing

VHDL/Verilog

DSP fundamentals

Fixed-point math

RF/digital interface

Education

Master’s degree in EE/Physics

Tools

Vivado

ModelSim

Job description

Alta Ares seeks an experienced FPGA engineer to translate radar sensing requirements into reliable hardware. You will collaborate with RF, electronics, and software teams to deliver high‑grade radar processing in production hardware.

You will implement RTL, validate with testbenches and hardware‑in‑the‑loop, and document design decisions to support scaling as we expand internationally.