FPGA Engineer — Electronic Warfare & Signals Intelligence

Alta Ares; Paris; On-site; EUR 70,000 - 110,000; Full time

Job summary

Alta Ares is seeking an experienced FPGA engineer to own FPGA function development for electronic warfare and signals intelligence. You will work with systems engineers to define processing requirements and verify DSP algorithms on SoC FPGAs, balancing performance with hardware constraints.

You will implement RTL in VHDL/SystemVerilog, bring up designs on target boards, and collaborate across RF, software and systems teams to ensure robust, validated solutions for defense applications.

Qualifications

• MSc in Electrical Engineering, Electronics or related field.
• Strong RTL development and verification experience in VHDL/SystemVerilog.

Responsibilities

• Own the development of FPGA functions for electronic warfare and signals intelligence capabilities.
• Collaborate with systems engineers to define processing requirements and assess feasibility.
• Build RTL modules in VHDL/SystemVerilog to process digitized RF signals and generate waveforms.
• Adapt DSP algorithms for FPGA implementation balancing accuracy, speed and resources.
• Establish verification methods and testbenches for functional behavior and performance.
• Connect FPGA logic to RF converters and embedded processors, defining data transfers and interfaces.
• Bring up FPGA designs on target boards and troubleshoot integration issues.
• Contribute to lab and field testing with RF, software and systems engineers.

Skills

RTL development

VHDL

SystemVerilog

FPGA design

SoC FPGA

DSP concepts

Hardware debugging

MATLAB

Simulink

Python

HLS

RF measurements

Data handling

Cross-domain reasoning

Education

MSc in Electrical Engineering

Tools

MATLAB

Simulink

Python

HLS

Spectrum analyzers

Oscilloscopes

Job description

Alta Ares is seeking an experienced FPGA engineer to own FPGA function development for electronic warfare and signals intelligence. You will work with systems engineers to define processing requirements and verify DSP algorithms on SoC FPGAs, balancing performance with hardware constraints.

You will implement RTL in VHDL/SystemVerilog, bring up designs on target boards, and collaborate across RF, software and systems teams to ensure robust, validated solutions for defense applications.