Postdoctoral researcher in the design of computing accelerators for embedded AI on FPGA.

Institut Mines-Télécom; Plouzané; Sur place; EUR 32 000 - 39 000; Plein temps

Avantages offerts par ce poste

On-site cafeteria

Public transport subsidies

Generous leave package

Partial teleworking possible

Résumé du poste

IMT Atlantique, a leading engineering school within the Institut Mines-Télécom, is seeking a Postdoctoral Researcher in the MEE department to develop FPGA-ready AI/DSP algorithms for robust GNSS receivers. The project STRIKEER partners with ARKANE and ArianeGroup to advance hardware-aware algorithms for drones and launchers.

You will optimize a real-time hybrid AI/DSP architecture on Zynq UltraScale+ devices, addressing SWaP constraints and delivering validated FPGA implementations.

Qualifications

• You have a PhD in digital electronics, embedded systems, or algorithm-architecture co-design.
• Experience in FPGA implementation of hybrid AI/DSP processing chains and GNSS/CRPA systems is essential.
• Strong autonomy, organizational skills, and ability to work in multidisciplinary teams.

Responsabilités

• Convert hybrid AI/DSP processing algorithms into FPGA-ready implementations.
• Integrate and optimize a real-time hybrid AI/DSP architecture on a Zynq UltraScale+ FPGA.
• Perform FPGA-In-the-Loop validation and on-target verification of the CRPA processing chain.
• Ensure documentation, traceability, and dissemination of results.

Connaissances

digital FPGA design

Verilog/VHDL

Fixed-point arithmetic

Quantized neural nets

GNSS/CRPA systems

Zynq UltraScale+

HLS

FPGA-In-the-Loop

Formation

PhD in digital electronics, embedded systems, or algorithm-architecture co-design

Outils

Vivado

Vitis

AMD/Xilinx toolchains

High-Level Synthesis (HLS)

Brevitas

FINN

hls4ml

Description du poste

A leading general engineering school within IMT (Institut Mines-Télécom), the number one group of engineering schools in France, IMT Atlantique aims to support transitions and train responsible engineers. We place scientific and technical excellence at the service of education, research, and innovation.

As part of the STRIKEER project, which aims to enhance the robustness of GNSS (Global Navigation Satellite Systems) receivers against jamming and spoofing attacks, we are hiring a Postdoctoral Researcher within our MEE (Mathematical and Electrical Engineering) department.

In collaboration with the project team, ARKANE, and ArianeGroup, your main responsibility will be to convert the hybrid AI/DSP processing algorithms developed within the project into FPGA-ready implementations. You will integrate and optimize a real-time hybrid AI/DSP architecture on a Zynq UltraScale+ FPGA, taking into account SWaP (Size, Weight, and Power) constraints for embedded systems on drones and launchers. Finally, you will perform on-target validation (FPGA-In-the-Loop), implement a complete hybrid CRPA processing chain, and ensure comprehensive documentation, traceability, and scientific dissemination.

• You have skills in digital FPGA design (VHDL/Verilog and/or High-Level Synthesis), proficiency with AMD/Xilinx toolchains (Vivado, Vitis), and fixed-point arithmetic.
• You have experience in implementing quantized neural networks on FPGA (Brevitas, FINN, hls4ml...), digital signal processing, GNSS/CRPA systems, and Zynq UltraScale+ SoC platforms (FPGA-In-the-Loop validation).
• You demonstrate scientific rigor, organizational skills, strong autonomy, and initiative. You enjoy working in a multidisciplinary team and possess excellent written and spoken communication skills in English.

The ideal candidate must hold a PhD (obtained less than 3 years prior to the hiring date) in digital electronics, embedded systems, or algorithm-architecture co-design.

WHY JOIN US

• Cutting-edge Research: Address high-stakes engineering challenges in aerospace and defense (drones, space launchers).
• Academic & Industrial Synergy: Work directly with industry leaders (ARKANE, ArianeGroup).
• Stimulating Environment: Join the MEE department, recognized for excellence in AI, signal processing, and hardware design.

BENEFITS

• On-site cafeteria
• Leisure and sports offers
• Public transport subsidies
• Sustainable mobility package (for carpooling or cycling)
• Family allowance
• Wide range of social benefits
• Partial teleworking possible
• Generous leave package

Indicative salary: €35,800 gross per year, depending on profile and experience (reduced employee social security contributions in the public sector).

CONTACT INFORMATION

• job content: Matthieu ARZEL - Professor [e-mail]
• administrative/HR aspects: Mélissandre MORVAN - Recruitment Assistant:[e-mail]

Application Deadline: December 4, 2026

Contract Start Date: 1st february 2027

Interviews: Rolling basis

Legal Notices

• Nature and Duration of the Contract: Fixed-term contract (CDD) of 18 months under public law or secondment for civil servants, renewable.
• Job Location: IMT Atlantique, Brest campus - 655 avenue du technopôle - 29280 Plouzané
• Internal Use Only:
• Job Category: II P
• The positions offered are open to all applicants, with accommodations available upon request for candidates with disabilities.
• This position is open to civil servants and/or contract employees.
• Any application may be subject to an administrative investigation.