Numerical and electronic simulation of bitflip in electronic circuits under laser fault injection

Institut d'Electronique et de Télécommunications de Rennes; Rennes; Sur place; EUR 40 000 - 60 000; Plein temps

Résumé du poste

A research institute in Rennes is developing a project focused on the vulnerability of hardware systems through fault injection methods. The aim is to create a model to predict fault migration in electronic systems using laser irradiation techniques. This research will involve studying the electronic properties of circuits and conducting simulations related to advanced silicon technologies. The project relies on advanced methodologies and aims to contribute to experimental studies in the field.

Description du poste

Overview

Topic description

Context

The Organic And Silicon Systems (OASIS) department of the IETR, CNRS, is developing research activities into the vulnerability of hardware systems through fault injection by laser irradiation on secure electronic components and circuits. The exposure of electronic components and/or circuits to nanosecond infrared laser pulses causes transient malfunctions in the basic cells of the electronic circuits concerned (CMOS inverters in RAM memories, for example) that can induce faults responsible for the inversion of a bit (Bitflip), and therefore modify a set of instructions for encoding data, making the device more vulnerable. These faults are induced by the transient conduction of a MOSFET transistor initially blocked by the generation of electron/hole pairs due to the absorption of photon flux during laser irradiation. This work is part of an assessment of the robustness of secure electronic circuits based on advanced CMOS technologies (FD SOI, UTBOX, FINFET).

Subject

Of all the studies carried out on assessing the robustness of electronic systems using the laser fault injection method, no study has been carried out to rely the effects of laser/silicon interaction on the electronic properties of circuits subjected to laser fault injection. In this project, we propose to develop a fault model based on the theoretical model of induced photo-current developed in the laboratory [1], combined with the electronic model describing the fault in CMOS inverters. At the same time, this modelling work will be based on TCAD Sentaurus numerical simulation work recently carried out during a master\'s course, in connection with the microscopic electronic properties of small MOS transistors associated with the most advanced technological nodes (FDSOI planar and FINFET technologies). The study carried out in this project will pave the way for bitflip simulation using the laser fault injection method on basic digital units (2-transistor CMOS inverters) of advanced silicon technologies, and therefore in digital cells for predicting fault migration in more complex electronic systems (microprocessors, etc.). This bottom-up approach will enable a parametric analysis of the physical fault phenomena linked to the technology, in order to anticipate experimental studies of vulnerability by laser fault injection on complex electronic systems.

[1] L. Pichon, L. Le Brizoual, E. Ferrucho-Alvarez, L. Claudepierre, J. L. Autran «Theoretical model of transient current in CMOS inverter under IR laser pulse responsible of bitflip in FDSOI technology»10. / TED..

Starting date

• 12-01

Funding category

Other public funding

Funding further details

Creach Labs