Implementation and Evaluation of Innovative Algorithms for Memory Testing in Integrated Circuits H/F

CEA; Grenoble; Sur place; EUR 40 000 - 60 000; Plein temps

Résumé du poste

An innovative internship opportunity awaits in the vibrant city of Grenoble, where you'll delve into the cutting-edge field of integrated circuits. Join a dynamic team at a leading research institute, focusing on the implementation and evaluation of innovative algorithms for memory testing. This role offers a unique chance to work on real-world applications in AI and cryptography, while collaborating with top industrial and academic partners. If you're a passionate final-year engineering or master's student eager to contribute to groundbreaking research and enhance your skills in a collaborative environment, this internship is the perfect stepping stone for your career.

Prestations

Access to cutting-edge tools

Collaborative research environment

Networking opportunities with industry leaders

Qualifications

• Final-year student pursuing engineering or master's in relevant fields.
• Strong interest in applied research and teamwork abilities.

Responsabilités

• Conduct technology watch and analysis of MBIST solutions.
• Develop a microcontroller test program for MBIST algorithms.
• Modify RTL code of C-SRAM for MBIST hardware implementation.

Connaissances

Proficiency in English

Knowledge of processor architectures

Design flow of digital circuits

Logical simulation software

Formation

Engineering diploma

Master’s degree in microelectronics

Master’s degree in electronics

Master’s degree in embedded systems

Outils

Simulation tools

Modeling tools

Exploration tools

Description du poste

Implementation and Evaluation of Innovative Algorithms for Memory Testing in Integrated Circuits H/F

Domaine

Contrat

Stage

Testing is a fundamental phase during the design and production of integrated circuits. It ensures not only the quality of electronic chips but also compliance with security constraints required by many applications. Memory Built-In Self-Test (MBIST) is a widely used technique for testing circuit memories. It entails integrating extra hardware components around the memory, which is capable of efficiently performing testing operations on-chip.

Near Memory Computing (NMC) is emerging as a promising solution to accelerate processing and to reduce energy consumption in integrated circuits. To study this architecture, the Laboratory of Innovative and Mixed Functions has developed the Computational-SRAM (C-SRAM). Controlled by a processor, this SRAM memory is surrounded by logic that enables it to perform efficient computations, including vector-type operations. Current application domains include Artificial Intelligence (AI) and cryptography, particularly post-quantum cryptography (PQC).

In this context, LFIM, in collaboration with the Laboratory of Computer Science, Robotics, and Microelectronics of Montpellier (LIRMM), has explored the testability of memories integrated into NMC systems, leveraging the existing computing capabilities in such architectures. As a result of the collaboration between these institutions, an initial theoretical study was conducted on the integration of MBIST algorithms into an NMC architecture.

In the next months, the team aims to implement and evaluate the proposed solution from the theoretical study on its C-SRAM module.

The intern’s primary responsibilities will include:

1. Technology watch and state-of-the-art analysis of MBIST testing solutions and NMC architectures in the existing literature.
2. Developing a microcontroller test program to implement an MBIST algorithm using the existing C-SRAM, which is not yet optimized for this application (MBIST software).
3. Modifying the RTL code of the C-SRAM functional design to implement the solution proposed in the theoretical study (MBIST hardware).
4. Evaluating the hardware and software MBIST implementations and comparing them with existing solutions in the literature.

To successfully complete this mission, the intern will have access to cutting-edge simulation, modeling, and exploration tools at CEA. Additionally, the intern will join a dynamic team at the heart of France's scientific ecosystem, fostering collaborations with key industrial and academic stakeholders in the field.

A final-year student pursuing an engineering diploma or a master’s degree in microelectronics, electronics, or embedded systems. The ideal candidate should exhibit proficiency in professional English communication, a strong interest in applied research, teamwork abilities, and the ability to work autonomously.

Preferred experience and/or skills:

• Knowledge of processor architectures.
• Familiarity with the design flow of digital circuits and logical simulation software.

Site

Grenoble

Référence

2024-34750

The LIST institute is part of the CEA (French Alternative Energies and Atomic Energy Commission) Technology Research Division. CEA-LIST brings together nearly 1,000 scientists, engineers, and technicians, expert in smart digital systems. We are committed to developing high-added-value innovations that respond to the major challenges facing our economy and society. This internship will take place in the Grenoble site of the CEA-List institute, in a research team focused on integrated circuits design for a variety of applications (e.g., cybersecurity, Internet of Things, artificial intelligence, emerging technologies).