Director - Silicon Logical Design

Axelera AI; France; Hybride; EUR 180 000 - 240 000; Plein temps

Avantages offerts par ce poste

Attractive compensation package

Pension plan

Employee insurances

Company shares option

Résumé du poste

A cutting-edge AI platform developer in France seeks a Director of Silicon Logical Design to lead a team in architectural realization and implementation of complex AI accelerator SoCs. This hands-on leadership role demands expertise in digital design with a focus on innovative solutions. Candidates must possess extensive experience and a proven track record in team management, along with strong skills in RTL and micro-architecture development. A competitive compensation package and opportunities for creative collaboration are part of the offering.

Qualifications

• Extensive experience in digital/logical design for complex SoCs with multiple successful tape-outs.
• Proven ability to lead and grow silicon design teams.
• Solid understanding of performance, power, and area trade-offs in advanced process nodes.
• Experience with large-scale SoC integration including CPUs and accelerators.
• Understanding of performance, power, and area trade-offs in advanced nodes.
• Collaboration with verification and physical design to achieve timing closure.
• Experience with AI/ML accelerators or high-performance compute architectures is a plus.

Responsabilités

• Lead and grow the silicon logical design team.
• Drive translation of system specifications into high-quality RTL implementations.
• Own end-to-end logical design execution for SoCs.
• Partner with architecture, verification, physical design, DFT, software and product teams.
• Define and enforce RTL quality, coding standards, reuse, and design reviews.
• Oversee block/top-level integration, meeting performance, power, area, and schedule targets.
• Support bring-up, debug, silicon validation, and root-cause analysis.
• Contribute to long-term technology roadmap, IP strategy, and future architecture directions.
• Mentor engineers and foster a culture of technical excellence and collaboration.

Connaissances

Lead and grow high-performing silicon design teams

Strong expertise in RTL and micro-architecture development (SystemVerilog / Verilog)

Experience with large-scale SoC integration

Strong communication skills

Digital Design

Cross-Functional Collaboration

AI Accelerators / HPC

Interconnects (AXI/NoC)

Power/Performance/Area Trade-offs

Outils

Verilog/SystemVerilog tooling

Digital design methodologies

Description du poste

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

In just four years, we have raised a total of $120 million and have built a world-class team of 220+ employees (including 49+ PhDs with more than 40,000 citations), both remotely from 17 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands.

We have also launched our Metis™ AI Platform, which achieves a 3-5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million.

Our unwavering commitment to innovation has firmly established us as a global industry pioneer.

Are you up for the challenge?

Position Overview

We are seeking a Director of Silicon Logical Design to lead and scale our digital design organization. In this role, you will be responsible for the architectural realization, RTL implementation, and integration of complex AI accelerator SoCs from specification through tape-out. You will combine deep technical expertise with strong people leadership to drive execution, quality, and innovation across multiple silicon programs.

This is a hands-on leadership role for someone who thrives at the intersection of architecture, implementation, and team building in a fast-paced startup environment.

Key responsibilities

• Lead and grow the silicon logical (digital) design team, including RTL, integration, and design methodology
• Drive the translation of system and micro-architecture specifications into high-quality RTL implementations
• Own the end-to-end logical design execution for one or more SoCs, from concept through tape-out
• Partner closely with architecture, verification, physical design, DFT, software, and product teams to ensure robust and scalable designs
• Define and enforce best practices for RTL quality, coding standards, reuse, and design reviews
• Oversee block-level and top-level integration, ensuring performance, power, area, and schedule targets are met
• Support bring-up, debug, and silicon validation activities, including root-cause analysis of silicon issues
• Contribute to long-term technology and roadmap planning, including IP strategy and future architecture directions
• Mentor and develop engineers, fostering a culture of technical excellence, ownership, and collaboration

Qualifications

• Extensive experience in digital / logical design for complex SoCs, with multiple successful tape-outs
• Proven ability to lead and grow high-performing silicon design teams
• Strong expertise in RTL and micro-architecture development (SystemVerilog / Verilog)
• Experience with large-scale SoC integration, including CPUs, accelerators, memory subsystems, and interconnects
• Solid understanding of performance, power, and area trade-offs in advanced process nodes
• Experience working closely with verification and physical design teams to achieve functional and timing closure
• Strong communication skills and the ability to operate at both strategic and hands-on technical levels
• Preferred:
• Experience with AI/ML accelerators, GPUs, NPUs, or high-performance compute architectures
• Familiarity with industry-standard interconnects (e.g., AXI, NoC architectures)
• Knowledge of low-power design techniques and multi-clock / multi-voltage systems
• Experience with silicon bring-up, post-silicon debug, and root-cause analysis
• Experience working in a startup or fast-scaling environment

Location

We offer a flexible working arrangement, with options to:

• Work from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Zurich in Switzerland, Florence and Milan in Italy or Bristol in the United Kingdom) if you're already based in the vicinity.
• Work fully remotely from any European country (incl. the UK) you are already in.
• Relocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven).

What We Offer

This is your chance to shape and be part of a dynamic, fast-growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and the option to get company shares.

An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.

Note: We wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.