Digital Verification Engineer - UVM

ic resources; Grenoble; Sur place; EUR 45 000 - 70 000; Plein temps

Résumé du poste

A leading fabless semiconductor company is seeking a digital verification engineer in Grenoble. The successful candidate will play a crucial role in the design and verification of digital processing functions for state-of-the-art ASICs. Applicants should have an MSc or PhD in Electrical Engineering and extensive experience in digital IC verification, including proficiency in relevant hardware description and scripting languages.

Qualifications

• 3+ years of hands-on experience in digital IC verification.
• Solid knowledge of VHDL or Verilog and scripting languages (TCL, Perl, Python).
• Experience in digital function verification of Mixed-Signal ICs is a plus.

Responsabilités

• Work on design of a state-of-the-art CMOS Transceiver ASIC.
• Involved in verification of digital processing functions of the ASIC.
• Collaborate closely with mixed-signal and digital IC design engineers.

Connaissances

Digital hardware description languages

Scripting languages

SystemVerilog

UVM methodology

Formal verification

Gate-level simulations

English communication

Formation

MSc or PhD in Electrical Engineering

Outils

Cadence RTL design tools

Synopsys RTL design tools

Description du poste

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Client:

IC Resources

Location:

Grenoble, France

Job Category:

Other

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EU work permit required:

Yes

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Job Reference:

b59964a4b08f

Job Views:

Posted:

Expiry Date:

31.07.2025

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Job Description:

Working for an exciting fabless semiconductor company, the successful digital verification engineer will work in a challenging technical environment on the design of a state-of-the-art CMOS Transceiver ASIC for the Communications market.

The candidate will be involved in the verification of the digital processing functions of the ASIC in close collaboration with the mixed-signal and digital IC design engineers.

Qualifications and Experience:

• You have a MSc or PhD in Electrical Engineering or equivalent and 3+ years of hands-on experience in digital IC verification
• You have solid knowledge of digital hardware description languages (VHDL or Verilog) and scripting languages (TCL, Perl, Python)
• You have solid knowledge of SystemVerilog and UVM methodology & processes
• Experience in formal verification & gate-level simulations is a plus
• Previous experience in verification of digital functions for Mixed-Signal ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus
• Good knowledge of Cadence or Synopsys RTL design tools
• Experience with FPGA is a plus
• You are a team player with a critical attitude and a sense of initiative
• You communicate fluently in English (oral and written)

For more information, please contact Rob Hudson @ IC Resources