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Une entreprise innovante dans le domaine des circuits intégrés recherche un Ingénieur Vérification IP pour renforcer son équipe. Ce rôle implique la validation de produits pour une efficacité énergétique optimale, en ciblant des applications Edge-IoT et HPC. Avec un cadre de travail orienté vers le développement durable, l'entreprise offre un environnement de travail stimulant et des avantages attractifs.
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Dolphin Semiconductor
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719762261831529267232760
2
31.05.2025
15.07.2025
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To support the growth of our Power Management activity and to succeed our customers' needs in terms of density, power consumption and operating frequency of their integrated circuits, we are looking for a IP Verification Engineer (F/M), based in Meylan (38).
As a member of a multidisciplinary team, you will be involved in validating products that optimize the energy efficiency of our clients' circuits, targeting Edge-IoT, automotive, and High Performance Computing (HPC) applications.
You will help define and implement insightful verification strategies to minimize validation time while maximizing coverage rates, thereby contributing to achieving performance and power goals for products such as the Maestro Power Manager Unit (PMU) , the Meerkat distributed setup margin sensor , or power optimization systems like ABB and AVS .
For IPs targeting the automotive market, you will contribute to the verification of ISO26262 requirements and support designers in selecting strategies to improve robustness against both permanent and transient faults.
As the person responsible for functional and power-aware verification of the products, you will work closely with tech leads and designers to define verification goals and strategies based on product specifications.
Define the verification plan (coverage-driven methodology)
Estimate cost and schedule
Develop and debug an advanced UVM-based verification environment
Develop coverage strategy and tests for parameterized IPs (SystemVerilog)
Perform functional, performance, and power verification
Identify blocks lacking robustness against faults and propose optimal safety mechanisms
Provide support to the design team throughout project execution
Leverage the latest techniques, tools, and technologies for verification activities
Contribute to the continuous improvement and maintenance of the verification methodology and flow
Provide training and support to other team members involved in verification activities
Provide internal support and guidance for verification-related activities
Participate in the evaluation, setup, and execution of projects in close collaboration with tech leads, project managers, and other team members
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You hold a Master's degree (Bac+5) or have graduated from an engineering school, and you have at least 5 years of experience in a similar position.
You have a solid understanding of the UVM (Universal Verification Methodology) and are comfortable applying it in complex verification environments. You are familiar with functional coverage techniques and know how to develop both directed and constrained-random stimulus to ensure robust test scenarios.
You have hands-on experience in RTL coding , using Verilog or SystemVerilog, and are capable of running and interpreting lint checks , as well as performing CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) analyses to ensure design quality.
You are knowledgeable about low-power design methodologies , particularly those involving UPF (Unified Power Format) standards such as UPF 2.0 or 2.1, and you understand the use of static verification tools for power intent validation.
You have worked with a wide range of EDA tools from vendors such as Cadence, Mentor, and Synopsys , covering the entire front-end digital design and verification flow.
You are proficient in scripting languages such as Tcl, Shell, Perl, or Python, which you use to automate tasks and streamline your workflow. You are comfortable working in both Linux and Windows environments .
Experience with formal verification tools , particularly QuestaFormal , is considered a strong plus. Additionally, familiarity with version control systems like SVN and Git , and project management tools such as JIRA , would be beneficial.
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