Design of a Reconfigurable Matrix of Analog Processing Elements for AI

Laboratoire de Physique de Clermont Auvergne & Iinstitut Pascal; Clermont-Ferrand; Sur place; EUR 40 000 - 60 000; Plein temps

Résumé du poste

Le Laboratoire de Physique de Clermont Auvergne recherche un doctorant pour un projet innovant portant sur la conception d'un processeur analogique pour les réseaux neuronaux convolutifs. Ce projet explore de nouvelles paradigmes informatiques en combinant performance et faible consommation d'énergie, avec des défis techniques importants à surmonter.

Qualifications

• Compétences en conception de circuits haute fréquence.
• Capacité à travailler avec des systèmes analogiques et numériques.
• Expérience dans l'intégration de systèmes complexes.

Responsabilités

• Concevoir un système matriciel pour le processeur analogique.
• Intégrer des cœurs de calcul analogique dans une architecture flexible.
• Résoudre des défis liés à l'intégrité des signaux et à la consommation d'énergie.

Connaissances

Conception de circuits analogiques

Compréhension des réseaux neuronaux

Travail sur l'architecture FPGA

Formation

Doctorat en ingénierie électrique ou domaine connexe

Description du poste

The ARTISTE project aims to design a reconfigurable analog processor dedicated to the inference of convolutional neural networks (CNNs). In a context where the explosion of computational needs for artificial intelligence faces the energy limits of traditional digital architectures, ARTISTE explores a radically innovative approach : leveraging the physical properties of analog electronics to perform massively parallel computations with low power consumption.

At the heart of this project lies the development of a generic analog circuit capable of adapting its structure to different neural network models through a reconfigurable architecture inspired by FPGAs. The processor integrates analog computation blocks optimized for fundamental operations such as multiplication, accumulation, and convolution. These analog “cores” are interconnected to form flexible and dynamic operator networks, capable of adapting to the requirements of various CNN models. The objective of this thesis is to design this dynamic interconnection system, enabling versatile computation capabilities.

Research Objective

The main objective of this thesis is the design of the high-frequency, low-power matrix system for the circuit. In a previous thesis, an analog computation core based on a micro-MAC (Multiply-Accumulator) matrix was designed and fabricated. These Analog Tensor Cores (ATCs) will eventually be distributed across the circuit with a reconfigurable interconnection system. By integrating these ATCs into a flexible matrix, the goal of this thesis is to develop a circuit capable of dynamically mapping different neural network topologies while leveraging the energy efficiency and compactness of analog computation.

This promising approach paves the way for new AI computing paradigms, especially in domains where speed and low power consumption are critical, such as IoT systems. The system is conceptually inspired by the reconfigurable nature of digital FPGAs but fundamentally differs in that some signals will remain analog, requiring the design of a dedicated analog-digital interface.

This architecture introduces numerous scientific challenges and roadblocks :

• Designing an analog processor based on a matrix of analog computation elements at a scale compatible with AI requirements.
• Ensuring signal integrity between analog blocks, as well as between the analog computation matrix and the digital processor, without the interfacing becoming a system bottleneck.
• Maintaining low power consumption and consistently high signal transfer speeds, regardless of data spatial location.
• Strategically positioning the A / D and D / A converters.

Funding category

Public funding alone (i.e. government, region, European, international organization research grant)