CHERI‑RISC-V Security HW/SW Intern

QUALCOMM, Inc.; Provence-Alpes-Côte d'Azur; On-site; EUR 10,000 - 17,000; Full time

Job summary

Qualcomm France S.A.R.L. invites a student to investigate HW/SW co-design techniques on CHERI-enabled RISC-V platforms.

The internship's primary goal is to develop practical prototypes to assess their suitability for Root of Trust and secure-enclave requirements. The project will explore how CHERI capability-based security can support memory safety, isolation of trusted services, and high-assurance architectures, combining architecture exploration with RTL and software development, compiler and

Qualifications

• Pursuing MS/PhD or engineering program in computer science, computer engineering, or related fields.

Responsibilities

• Investigate HW/SW co-design techniques on CHERI-enabled RISC-V platforms.
• Develop practical prototypes to assess RoT or secure-enclave requirements.
• Explore memory-safety, compartmentalization, and isolation concepts for secure IP.
• Combine architecture exploration with RTL, software development, and security evaluation.

Education

MS/PhD or engineering program in Computer Science, Computer Engineering, or related fields

Tools

C

C++

Rust

Verilog

SystemVerilog

Python

Vivado

Cadence

Synopsys

Job description

Qualcomm France S.A.R.L. invites a student to investigate HW/SW co-design techniques on CHERI-enabled RISC-V platforms.

The internship's primary goal is to develop practical prototypes to assess their suitability for Root of Trust and secure-enclave requirements. The project will explore how CHERI capability-based security can support memory safety, isolation of trusted services, and high-assurance architectures, combining architecture exploration with RTL and software development, compiler and