Application Specific Integrated Circuit Design Engineer

JR France; Nice; Sur place; EUR 40 000 - 70 000; Plein temps

Résumé du poste

A dynamic company located in Sophia-Antipolis is seeking a skilled ASIC Design Engineer to work on groundbreaking projects. This role offers the opportunity to advance your career while enjoying a lifestyle near the Mediterranean. Candidates should have a strong background in RTL design and proficiency in hardware verification methodologies.

Qualifications

• Expertise in RTL and testbench development.
• Strong grasp of hardware verification methodologies.
• Familiarity with SoC architectures and protocols.

Responsabilités

• Perform RTL design, verification, and validation.
• Conduct architectural studies and write specifications.
• Take ownership of block design.

Connaissances

RTL design

Verilog

System Verilog

VHDL

SoC architectures

hardware verification methodologies

Git

scripting

Bash

Tcl

English communication

Description du poste

Social network you want to login/join with:

Application Specific Integrated Circuit Design Engineer, nice

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Client:

IC Resources

Location:

nice, France

Job Category:

Other

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EU work permit required:

Yes

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Job Reference:

622516069300017561632763

Job Views:

1

Posted:

24.06.2025

Expiry Date:

08.08.2025

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Job Description:

Digital ASIC Design Engineer - Sophia Antipolis

Are you an experienced ASIC Design Engineer looking for an exciting opportunity to advance your career? We are seeking passionate individuals to join a fast-growing company in a dynamic and innovative environment. Based in the stunning Sophia-Antipolis business park, this role offers the perfect combination of professional growth and an unmatched lifestyle near the Mediterranean Sea.

As an ASIC Design Engineer , you will work on cutting-edge projects that include large SoC designs for both internal development and customer-driven initiatives. You’ll have the chance to make impactful contributions, take ownership of key design elements, and collaborate with a talented team.

Key Responsibilities:

• Perform RTL design, verification, and validation.
• Conduct architectural studies and write specifications.
• Take ownership of block design.
• Implement and optimise designs on hardware.
• Participate in board bring-up and debugging processes.
• Collaborate across teams to deliver robust solutions.
• Provide technical support to customers and partners.

What We’re Looking For:

• Expertise in RTL and testbench development using Verilog, System Verilog, or VHDL.
• Familiarity with SoC architectures and protocols like AXI or AHB.
• Knowledge of at least one full ASIC implementation flow.
• Strong grasp of hardware verification methodologies.
• Proficiency with Git or similar version control systems.
• Experience in scripting and flow automation (e.g., Bash, Tcl).
• Excellent written and spoken English.
• A team player with clear and effective communication skills.