Application Specific Integrated Circuit Design Engineer

JR France; Marseille; Sur place; EUR 50 000 - 80 000; Plein temps

Résumé du poste

A leading technology company in Sophia Antipolis seeks a passionate Digital ASIC Design Engineer to work on cutting-edge projects in SoC design. This role offers opportunities for professional growth and an exceptional lifestyle near the Mediterranean. Ideal candidates possess strong expertise in RTL design using Verilog, System Verilog, or VHDL and have effective communication skills.

Qualifications

• Expertise in RTL and testbench development using Verilog, System Verilog, or VHDL.
• Strong grasp of hardware verification methodologies.
• Excellent written and spoken English.

Responsabilités

• Perform RTL design, verification, and validation.
• Take ownership of block design.
• Collaborate across teams to deliver robust solutions.

Connaissances

RTL design

testbench development

SoC architectures

hardware verification methodologies

scripting and flow automation

effective communication

Outils

Verilog

System Verilog

VHDL

Git

Description du poste

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Client:

IC Resources

Location:

Job Category:

Other

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EU work permit required:

Yes

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Job Reference:

622516069300017561632761

Job Views:

1

Posted:

24.06.2025

Expiry Date:

08.08.2025

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Job Description:

Digital ASIC Design Engineer - Sophia Antipolis

Are you an experienced ASIC Design Engineer looking for an exciting opportunity to advance your career? We are seeking passionate individuals to join a fast-growing company in a dynamic and innovative environment. Based in the stunning Sophia-Antipolis business park, this role offers the perfect combination of professional growth and an unmatched lifestyle near the Mediterranean Sea.

As an ASIC Design Engineer , you will work on cutting-edge projects that include large SoC designs for both internal development and customer-driven initiatives. You’ll have the chance to make impactful contributions, take ownership of key design elements, and collaborate with a talented team.

Key Responsibilities:

• Perform RTL design, verification, and validation.
• Conduct architectural studies and write specifications.
• Take ownership of block design.
• Implement and optimise designs on hardware.
• Participate in board bring-up and debugging processes.
• Collaborate across teams to deliver robust solutions.
• Provide technical support to customers and partners.

What We’re Looking For:

• Expertise in RTL and testbench development using Verilog, System Verilog, or VHDL.
• Familiarity with SoC architectures and protocols like AXI or AHB.
• Knowledge of at least one full ASIC implementation flow.
• Strong grasp of hardware verification methodologies.
• Proficiency with Git or similar version control systems.
• Experience in scripting and flow automation (e.g., Bash, Tcl).
• Excellent written and spoken English.
• A team player with clear and effective communication skills.