Silicon Engineer

Sine Engineering; Tampere; On-site; EUR 60,000 - 90,000; Full time

Benefits offered by this job

Vacation: 4+1 weeks

Lunch benefit

Wellbeing allowance

Annual gadget budget

Hackathons/offsites

Job summary

Sine Engineering, Tampere, Finland, is hiring Silicon Engineers (all levels) to build next‑gen Radio System‑on‑Chips from RTL to tape‑out. You’ll work on modem baseband, app engines, interconnects, and peripherals in a collaborative, innovation‑driven environment.

We welcome early‑career and senior engineers, with roles spanning digital design, verification, and mixed-signal work. Expect rolling openings, competitive benefits, and a culture that values autonomy and impactful engineering.

Qualifications

• Background in digital design or verification with proven project work.
• Strong RTL knowledge: Verilog/SystemVerilog/VHDL.
• Familiarity with timing analysis and ASIC/SoC concepts.
• English proficiency at B1 level or higher.

Responsibilities

• RTL design, verification, and virtual modeling of SoC blocks across the digital data path.
• Specify and develop RTL (Verilog/SystemVerilog/VHDL), drive micro-architecture decisions, and support synthesis, timing closure, and physical design handoff.
• Build testbenches and verification environments (UVM/SystemVerilog), define coverage and verification plans.
• For mixed-signal engineers: design and verify analog and mixed-signal components for wireless systems and digital IC blocks.
• Participate in design and code reviews, SoC bring-up, silicon validation, and debugging across RTL, gate-level, and post-silicon stages.

Skills

RTL design

SystemVerilog

Verilog

VHDL

UVM

Python

SoC

Verification

Mixed-signal design

AI-assisted design

Formal verification

FPGA prototyping

Low-power design

SystemC/virtual modeling

Open-source hardware

English

Tools

FPGA prototyping

Emulation

SystemC

Job description

Sine Engineering is a leading global company specializing in the development of advanced radio communication and navigation systems. We design and build mission‑critical infrastructure for the multi‑million‑drone era.

At Sine, you will work with cutting‑edge technologies tested in some of the world’s most challenging environments, with the opportunity to see your ideas evolve into an ecosystem that contributes to global safety and progress.

We are looking for Silicon Engineers (all levels) to join our team building next‑generation Radio System‑on‑Chips (SoCs) from the ground up. Whether your strength is in design or verification, you will work alongside an exceptional team of engineers shaping silicon that powers resilient, high‑performance wireless links - from initial RTL to tape‑out and field validation.

We are hiring across experience levels, from early‑career engineers to senior contributors ready to own complex subsystems. Multiple positions across different disciplines are open and will be filled on a rolling basis.

Responsibilities

• RTL design, verification, and/or virtual modeling of SoC blocks across the digital data path - including modem baseband, application engines, interconnects, and peripheral subsystems
• Specify and develop RTL (Verilog / SystemVerilog / VHDL), drive micro‑architecture decisions, and support synthesis, timing closure, and physical design handoff
• Build testbenches and verification environments (UVM / SystemVerilog), define coverage and verification plans (including formal verification where applicable), and drive blocks to coverage closure and sign‑off
• For mixed-signal engineers:
• Specify, design, implement, verify, and validate analog and mixed‑signal components for wireless communication systems and custom digital IC blocks (e.g., I/O, frequency synthesizers)
• Participate in design and code reviews, SoC bring‑up, silicon validation, and debugging across RTL, gate‑level, and post‑silicon stages

Skills & Experience

• Background in digital design or verification - from recent graduates with strong fundamentals and relevant project work to senior engineers with multiple SoCs brought to silicon
• Solid understanding of digital design fundamentals and RTL (Verilog / SystemVerilog / VHDL)
• Understanding of timing, CDC, linting, simulation, and low‑power design techniques (scaled to experience level)
• Understanding of verification methodologies (UVM, constrained‑random, coverage‑driven), scripting (Python / Tcl / Perl), and simulation flows
• Familiarity with SoC concepts: bus protocols (e.g., AXI / AHB), clock and reset architectures, and memory subsystems
• English proficiency at B1 level or higher

Nice to Have

• Experience with wireless/radio SoCs, modem baseband, or DSP blocks
• Experience with AI‑assisted code generation and tools; curiosity to develop AI‑driven design flows
• Exposure to formal verification, emulation, or FPGA prototyping
• Experience with low‑power design
• Experience with mixed‑signal or analog design
• Experience in defense or dual‑use systems
• Experience with SystemC and virtual modeling
• Open‑source hardware contributions, academic publications, or relevant project portfolios (especially for early‑career candidates)

What We Offer

Paid Time Off

• 4+1 weeks of vacation from your first day

Health & Wellness Package

• Lunch benefit: daily allowance up to the tax‑free limit
• Sport & culture benefit: annual budget for gyms, sports, and cultural activities
• Wellbeing allowance: support for massage, mental health services, and other wellness needs
• Extended occupational healthcare: enhanced coverage including partial dental care.
• Accident insurance (24/7): coverage during both work and personal time
• Business travel insurance
• Office perks: coffee, snacks, fruits, and more

Work Model

• Flexible working hours (core hours: 10:00–15:00)
• No‑crunch policy - no systematic overtime; any overtime is compensated
• Meeting‑light culture with protected focus time
• Annual lab & gadget budget for hardware, tools, books, and learning materials
• Hackathons and offsites focused on innovation

Travel & Mobility

• Full coverage of business travel expenses (tickets, accommodation, transportation)

Impact & Culture

• High autonomy with zero micromanagement

Location

Tampere, Finland

Culture Statement

Don’t meet every requirement? Research shows that many candidates hesitate to apply unless they meet 100% of the qualifications. At Sine Engineering, we value authenticity and encourage you to apply even if your experience doesn’t perfectly match every requirement.

You may be the ideal candidate for this role - or for another opportunity with us.

Join our team and help shape the future of UAV technology.

Privacy Notice

By applying for this position, you consent to the processing of your personal data for recruitment purposes. Your data will be handled in accordance with the EU General Data Protection Regulation (GDPR) and the Finnish Act on the Protection of Privacy in Working Life.

We will retain your data for up to 6 months unless you provide consent to a longer retention period.