Senior FPGA Engineer: From RTL to Real-World Hardware

Jobtailor; Espoo; On-site; EUR 70,000 - 100,000; Full time

Job summary

Jobtailor in Espoo, Finland, is seeking an experienced FPGA engineer to design and integrate FPGA components across multiple platforms. You will enhance RTL components, debug, simulate, and test hardware while collaborating with hardware, firmware, and software teams.

The role requires deep HDL expertise (Verilog/VHDL), experience with Quartus or Vivado, and strong English communication. Expect a hands-on, lifecycle-spanning position in a fast-paced hardware team.

Qualifications

• Minimum 5 years of hands-on FPGA design with Verilog or VHDL.
• Strong understanding of FPGA architecture, timing closure, CDC/RDC.
• Experience with Quartus and/or Vivado across the FPGA flow (synthesis, sim, place-and-route, timing).
• Experience with DDR3/4, I2C, SPI, RS232 interfaces.
• Experience with Modelsim/Questa for testbenches and debugging.
• Strong written and verbal communication in English.

Responsibilities

• Develop and integrate new FPGA components and systems.
• Add features to third‑party IPs.
• Integrate RTL components into multiple FPGA platforms.
• Debug, maintain, and optimize existing FPGA designs.
• Design, simulate, synthesize, and hardware test FPGA designs.
• Collaborate with hardware, firmware, and software teams.
• Contribute to technical documentation.
• Work across the FPGA lifecycle from RTL design to hardware testing.

Skills

FPGA Design Using Verilog

FPGA Design Using VHDL

Digital Logic Design

CDC/RDC

C/C++ Programming

Scripting (Bash, Python, TCL)

Strong English Communication

Testbench Development

High-Speed Interfaces (PCIe, USB)

Verilog/VHDL familiarity

Tools

Altera Quartus

Xilinx Vivado

Jira

Git

Job description

Jobtailor in Espoo, Finland, is seeking an experienced FPGA engineer to design and integrate FPGA components across multiple platforms. You will enhance RTL components, debug, simulate, and test hardware while collaborating with hardware, firmware, and software teams.

The role requires deep HDL expertise (Verilog/VHDL), experience with Quartus or Vivado, and strong English communication. Expect a hands-on, lifecycle-spanning position in a fast-paced hardware team.