Senior FPGA Engineer

Jobtailor; Espoo; On-site; EUR 70,000 - 100,000; Full time

Job summary

Jobtailor in Espoo, Finland, is seeking an experienced FPGA engineer to design and integrate FPGA components across multiple platforms. You will enhance RTL components, debug, simulate, and test hardware while collaborating with hardware, firmware, and software teams.

The role requires deep HDL expertise (Verilog/VHDL), experience with Quartus or Vivado, and strong English communication. Expect a hands-on, lifecycle-spanning position in a fast-paced hardware team.

Qualifications

• Minimum 5 years of hands-on FPGA design with Verilog or VHDL.
• Strong understanding of FPGA architecture, timing closure, CDC/RDC.
• Experience with Quartus and/or Vivado across the FPGA flow (synthesis, sim, place-and-route, timing).
• Experience with DDR3/4, I2C, SPI, RS232 interfaces.
• Experience with Modelsim/Questa for testbenches and debugging.
• Strong written and verbal communication in English.

Responsibilities

• Develop and integrate new FPGA components and systems.
• Add features to third‑party IPs.
• Integrate RTL components into multiple FPGA platforms.
• Debug, maintain, and optimize existing FPGA designs.
• Design, simulate, synthesize, and hardware test FPGA designs.
• Collaborate with hardware, firmware, and software teams.
• Contribute to technical documentation.
• Work across the FPGA lifecycle from RTL design to hardware testing.

Skills

FPGA Design Using Verilog

FPGA Design Using VHDL

Digital Logic Design

CDC/RDC

C/C++ Programming

Scripting (Bash, Python, TCL)

Strong English Communication

Testbench Development

High-Speed Interfaces (PCIe, USB)

Verilog/VHDL familiarity

Tools

Altera Quartus

Xilinx Vivado

Jira

Git

Job description

Develop and integrate new FPGA components and systems
Add features to third-party IPs
Integrate RTL components into multiple FPGA platforms
Debug, maintain, and optimize existing FPGA designs
Conduct design, simulation, synthesis, and hardware testing
Collaborate with hardware, firmware, and software teams
Contribute to technical documentation
Work across the FPGA development lifecycle, from RTL design and integration through simulation, synthesis, debugging, and hardware testing

Requirements

• Minimum 5 years of hands-on experience in FPGA design using Verilog and/or VHDL
• Strong understanding of FPGA architecture, digital logic design, Timing Closure, and Clock and Reset Domain Crossing (CDC/RDC)
• Experience with Altera Quartus and/or Xilinx Vivado across the FPGA development flow, including synthesis, simulation, place-and-route, and timing closure
• Experience with common interfaces such as DDR3/4, I2C, SPI, and RS232
• Experience developing testbenches with Modelsim/Questa and debugging FPGA designs using on-chip and laboratory debugging tools
• Strong written and verbal communication skills in English
• Experience with DisplayPort and HDMI
• Experience with high-speed communication interfaces such as PCIe and USB
• Experience with high-speed FPGA transceivers (PMAs and PCSs)
• Knowledge of general hardware design
• Knowledge of C/C++, bare-metal software, and scripting (bash, TCL, Python)
• Knowledge of Jira and Git

Core Competencies

Demonstrates extensive experience in FPGA design and integration, with proficiency in Verilog and VHDL, and a strong understanding of FPGA architecture and digital logic design. Capable of collaborating across teams and contributing to technical documentation throughout the FPGA development lifecycle.

Highest-signal resume keywords

• FPGA Design Using Verilog
• FPGA Design Using VHDL
• Altera Quartus
• Xilinx Vivado
• Digital Logic Design

Hard Skills

• FPGA Architecture
• Timing Closure
• Clock And Reset Domain Crossing (CDC/RDC)
• Testbench Development With Modelsim/Questa
• High-Speed Communication Interfaces (PCIe, USB)
• Common Interfaces (DDR3/4, I2C, SPI, RS232)
• High-Speed FPGA Transceivers (PMAs, PCSs)
• C/C++ Programming
• Scripting (Bash, TCL, Python)
• Debugging FPGA Designs

Soft Skills

• Strong Written Communication Skills
• Strong Verbal Communication Skills

Industry Keywords

• FPGA Development Lifecycle
• Simulation
• SynthesisPlace-And-Route
• Hardware Testing

Tools & Technologies

• Jira
• Git