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Semidynamics in Barcelona is seeking a senior verification leader to own the verification strategy for a memory-centric AI system. You will lead a small team of verification leads, shape the verification plan, and drive through tape-out sign-off with cross-functional partners.
Requires 12+ years in design verification, strong SystemVerilog/UVM expertise, and proven leadership in complex SoC projects. Domestic and international emulation/CI experience a plus. Fluent English mandatory.
You will lead the verification of our 4-core coherent AI system, through a team of 3–4 verification leads, all the way to tape-out sign-off.
About Semidynamics Semidynamics builds memory-centric AI inference silicon in Barcelona. Our chips combine RISC‑V CPUs, Vector and Tensor Units and our Gazzillion Misses memory engine, so that large language models are never starved of data. In April 2026, SK hynix, one of the world's leading memory makers, made a strategic investment in the company. You will not inherit a mature flow at a company of 10,000 people. You will shape it, with a team you lead and a design team one desk away.
You own the verification strategy. The plan you write is the one the company tapes out with. You build the organisation. You shape the team, hire the people you want to work with, and choose methods and tools. A seat at the table. You review the architecture and microarchitecture with the design leads, early enough to change them. A hard, current problem. Verifying a memory-centric, coherent multi-core AI system is one of the most interesting challenges in the industry today.
You always ask: "Who/what actually checks this?" You keep inventing new scenarios to find the next bug before it finds us. You like to mentor, and you enjoy seeing engineers on your team grow.
Work at one of Europe's most promising deep‑tech semiconductor scale‑ups