Senior FPGA/ASIC Logic Design Engineer – Hybrid

Description Ciklum; España; Hybrid; EUR 70,000 - 90,000; Full time

Benefits offered by this job

Medical insurance

Udemy license

Language courses

Company-paid certifications

23 vacation days

Short Fridays

Internal Mobility Program

Team-building events

Job summary

Ciklum is seeking a Senior Logic Design Engineer in Spain to join a cross-functional team developing next-generation FPGA/ASIC platforms. You will design high-performance RTL modules, optimize timing, and collaborate across architects, verification, software, and hardware specialists in an international setting.

You will work on systems enabling real-time control and waveform generation, contributing to end-to-end RTL development lifecycle and design validation.

Qualifications

• Bachelor's or Master's in Electrical Engineering or Computer Engineering (or equivalent).
• 4+ years in FPGA/ASIC digital logic design.
• Strong SystemVerilog and RTL development experience.
• Knowledge of timing, synthesis, and STA.
• Experience with FPGA/ASIC toolchains and RTL debugging.

Responsibilities

• Design and implement low-latency RTL modules using SystemVerilog.
• Develop digital logic for FPGA/ASIC applications including DSP and real-time control.
• Lead RTL development lifecycle from architecture to verification.
• Optimize designs for timing, latency, resource use, and power.
• Perform synthesis, STA, and timing constraint verification.
• Collaborate with verification and software teams for interfaces.
• Integrate digital IP into FPGA/ASIC architectures.
• Participate in design reviews and process improvements.

Skills

SystemVerilog

RTL design

ASIC/FPGA

Digital logic

CDC

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

AMD Vivado

Synopsys VCS

Siemens Questa

AMD Versal tools

Job description

Ciklum is seeking a Senior Logic Design Engineer in Spain to join a cross-functional team developing next-generation FPGA/ASIC platforms. You will design high-performance RTL modules, optimize timing, and collaborate across architects, verification, software, and hardware specialists in an international setting.

You will work on systems enabling real-time control and waveform generation, contributing to end-to-end RTL development lifecycle and design validation.