Senior Engineer - Silicon Physical Design (Italy Based)

Axelera AI; Madrid; A distancia; EUR 70.000 - 90.000; Jornada completa

Descripción de la vacante

A cutting-edge AI technology firm is seeking a Senior Engineer in Silicon Physical Design to develop innovative multi-core SoCs. Ideal candidates will have 10+ years in Physical Design and expertise in EDA tools. This position can be hybrid or remote from Italy, with attractive compensation and employee benefits.

Servicios

Attractive compensation package

Pension plan

Employee insurances

Option to get company shares

Formación

• 10+ years of experience in Physical Design (RTL to GDS).
• Expertise in synthesis, timing analysis, and timing closure.
• Hands-on experience with leading EDA tools.

Responsabilidades

• Develop multi-core in-memory compute SoCs.
• Perform synthesis, floorplanning, place and route, extraction.
• Collaborate with architecture and RTL teams.

Conocimientos

Physical Design Expertise

Strong Communication

Teamwork

Scripting (Python, Tcl, Perl)

Problem-Solving

Herramientas

Primetime

StarRC

Genus

Innovus

Design Compiler

Calibre

Descripción del empleo

Senior Engineer - Silicon Physical Design (Italy based)

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Continue with Google Continue with GoogleContinue with Google Continue with GoogleContinue with Google Continue with GoogleContinue with Google Continue with GoogleContinue with Google Continue with GoogleContinue with Google Continue with GoogleAbout Us

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.About Us

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

In just three years, we have raised a total of $120 million and have built a world-class team of 180+ employees (including 55+ PhDs with more than 40,000 citations), both remotely from 11 different countries and with offices in Belgium, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands.

We have also launched our Metis AI Platform, which achieves a 3-5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million.

Our unwavering commitment to innovation has firmly established us as a global industry pioneer.

Are you up for the challenge?

Position Overview

As a Senior Silicon Physical Design Engineer at Axelera AI, you will play a crucial role in developing cutting-edge multi-core in-memory compute SoCs. Leveraging your expertise in ASIC Physical Design from RTL to GDS, you will be responsible for synthesis, floorplanning, place and route, extraction, timing analysis, physical verification, EMIR signoff, and formal verification. You will collaborate closely with architecture and RTL teams to ensure successful project execution.

Key Responsibilities :

Perform synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification.Ensure timing closure, constraint generation, and optimization.Execute clock tree synthesis (CTS) and clock-building techniques.Integrate IPs including memories, I / Os, embedded processors, DDR, networking fabrics, and analog IPs.Utilize EDA tools such as Primetime, StarRC, Genus, Innovus, Design Compiler, ICC / ICC2, FC, and Calibre.Develop automation scripts in Python, Tcl, or Perl.Debug and solve technical challenges related to physical design.Collaborate with architecture, RTL, and verification teams.

Qualifications :

10+ years of experience in Physical Design (RTL to GDS).Strong communication and teamwork skills.Expertise in synthesis, timing analysis, and timing closure.Hands-on experience with leading EDA tools (Primetime, StarRC, Genus, Innovus, Design Compiler, ICC / ICC2, FC, Redhawk, and Calibre).Proficiency in clocking techniques and CTS.Experience in IP integration across various domains.Strong scripting skills (Python, Tcl, or Perl).Proven problem-solving and debugging capabilities.Fluent in English (spoken and written). Italian not required.

Highly preferred :

Experience in top-level integration and I / O ring design.Knowledge of chip-package-board co-simulation and packaging.Ability to influence design methodologies and tool flows.Experience working with EDA vendors to resolve tool issues.Understanding of semiconductor device physics and multi-domain design.

Location

This position is based Italy (in hybrid or remote set up). We also support relocation to Bologna, Florence or Milan for talent based abroad and interested in this role.

What Weoffer

This is your chance to shape and be part of a dynamic, fast-growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and the option to get company shares.

An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.

At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.

Seniority level

Seniority level Mid-Senior levelEmployment type

Employment type Full-timeJob function

Job function Engineering and Information TechnologyIndustries Semiconductor ManufacturingReferrals increase your chances of interviewing at Axelera AI by 2xSign in to set job alerts for “Physical Design Engineer” roles.

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