Senior Digital Design Engineer - FPGA, SoC & ARM Prototyping

1120 AD Spain; Valencia; Presencial; EUR 70.000 - 110.000; Jornada completa

Descripción de la vacante

Analog Devices, Inc. is seeking a Senior Digital Design Engineer to lead FPGA-based design, RTL development, and integration for SOC projects. The role involves collaborating with verification, analog, and implementation teams to ensure timing, power, and area targets are met.

The candidate will work with ARM-based architectures, AXI/AHB protocols, and industry-standard toolchains to deliver silicon-ready designs while maintaining high-quality documentation and stakeholder communication.

Formación

• Bachelor's or Master's in Engineering (Electronic/Electrical or related)
• Deep knowledge of FPGA development flow and RTL design (Verilog/SystemVerilog)
• Experience with timing, power, DFT, and manufacturing test targets
• Interaction with verification and analog teams and with implementation teams to convert RTL to silicon
• Ability to work in a diverse team and excellent interpersonal skills
• Precise documentation and proactive problem solving

Responsabilidades

• FPGA prototyping and RTL design for complex SoC projects
• Develop models and self-checking mechanisms for FPGA HW/SW
• Define timing constraints and perform static timing analysis
• Coordinate with verification, analog, and implementation teams
• Interact with customers and stakeholders to meet design targets
• Support IP integration and architecture definition for blocks and platforms

Conocimientos

FPGA prototyping

Verilog/SystemVerilog

ASIC/SoC design

Timing closure

UVM verification

IP integration

Team communication

Documentation

Educación

Bachelor's or Master's in Engineering

Herramientas

Verilog/VHDL toolchains

UVM

Descripción del empleo

Analog Devices, Inc. is seeking a Senior Digital Design Engineer to lead FPGA-based design, RTL development, and integration for SOC projects. The role involves collaborating with verification, analog, and implementation teams to ensure timing, power, and area targets are met.

The candidate will work with ARM-based architectures, AXI/AHB protocols, and industry-standard toolchains to deliver silicon-ready designs while maintaining high-quality documentation and stakeholder communication.