RISC-V SoC Design Lead & Architect

Innova IRV Microelectronics; Málaga; Presencial; EUR 90.000 - 130.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Flexible paid time off

Disability accommodation assistance

Descripción de la vacante

Innova IRV Microelectronics, based in Málaga, seeks a Digital IC Design Lead Engineer to drive architecture, RTL design and integration for next‑generation RISC‑V SoCs. You will lead a team of Digital IC Design Engineers, shaping pipelines, memory hierarchies and IP integration while coordinating with verification and silicon bring‑up teams.

The ideal candidate has 7+ years in digital IC/ASIC design, strong Verilog/SystemVerilog expertise and a track record of RISC‑V projects.

Formación

• 7+ years of experience in digital IC or ASIC design.
• Master’s degree in electronic engineering, computer engineering, microelectronics or related semiconductor focus.
• Demonstrated experience delivering multiple ASIC/SoC developments from specification to silicon.
• Experience leading technical teams or acting as technical lead on complex semiconductor projects.
• Proven track record in RISC‑V processor or subsystem development.
• Experience integrating complex SoCs with CPUs, accelerators, memories and IPs.
• Expert knowledge on Verilog and SystemVerilog RTL design.
• RISC‑V ISA and related architecture knowledge including debug, MMU and caches.
• Experience with synthesis, STA, CDC/RDC analysis, low‑power techniques and DFT concepts.
• Experience with FPGA prototyping and HW bring‑up.
• Proficiency with EDA tools and scripting for automation.

Responsabilidades

• RISC-V SoC components architecture and RTL design leadership across teams.
• Own IP and subsystem development lifecycle from spec to product release.
• Lead multiple projects, plan priorities, manage risks and deliverables.
• Mentor and develop Digital IC Design Engineers through reviews and coaching.
• Define robust verification strategies with coverage goals.
• Oversee integration of cores, accelerators, memory subsystems and IPs.
• Drive timing, power, area targets and testability improvements.
• Lead post‑silicon debug, root‑cause analysis and design improvements.
• Establish digital design methodologies, coding standards and automation.

Conocimientos

RISC-V architecture leadership

RTL design expertise

Scripting (Python/Tcl)

EDA tools proficiency

Team leadership

Open-source RISC-V experience

Educación

Master's degree in Electronic Engineering / Microelectronics

PhD in Electronic Engineering / Microelectronics (Desirable)

Herramientas

Synopsys

Cadence

Siemens

Descripción del empleo

Innova IRV Microelectronics, based in Málaga, seeks a Digital IC Design Lead Engineer to drive architecture, RTL design and integration for next‑generation RISC‑V SoCs. You will lead a team of Digital IC Design Engineers, shaping pipelines, memory hierarchies and IP integration while coordinating with verification and silicon bring‑up teams.

The ideal candidate has 7+ years in digital IC/ASIC design, strong Verilog/SystemVerilog expertise and a track record of RISC‑V projects.