JEFE / A PRODUCCION

Chipright; Santiago de Compostela; Presencial; EUR 50.000 - 70.000; Jornada completa

Descripción de la vacante

Chipright is seeking a Senior Analog Mixed Signal Design Engineer to join their R&D team. This role involves working on innovative mixed-signal IC designs, requiring significant expertise in Analog Mixed Signal Design and experience with high-speed communication systems. Ideal candidates will have a strong academic background and extensive practical experience in silicon design, making a significant contribution to the company's future product offerings.

Formación

• Minimum 5 years' experience in Analog Mixed Signal Design.
• Experience with ADCs, DACs, and PLLs.
• Proven track record of successful silicon design.

Responsabilidades

• Lead the design and development of mixed-signal ICs.
• Ensure successful design from product definition to qualification.
• Review and verify analog layout work of peers.

Conocimientos

Analog Mixed Signal Design

High Speed Communications

Full-Custom Analog Layout Techniques

Written and Verbal English Communication

Educación

Degree / Master / PhD in Electronic Engineering

Herramientas

Cadence

Synopsys

Descripción del empleo

Senior Analog Mixed Signal Design Engineer

Chipright is looking for a Senior Mixed-Signal IC Design Engineer. As a member of the mixed-signal design team in the R&D department of the company, you will be a key part in the definition, design, and development of the future products of the company.

Requirements :

• Degree / Master / PhD in Electronic Engineering.
• At least 5 years of experience in Analog Mixed Signal Design, specifically in High Speed Communications.
• Experience working on blocks such as ADCs, DACs, and PLLs.
• Experience in delivering successful design in silicon : product definition, characterization, qualification, and productization.
• Experience on designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm or below), as well as with analog and mixed-signal IC design tools, such as Cadence or Synopsys.
• Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes.
• Good knowledge of full-custom analog layout techniques, including the ability to review the work of others.
• Excellent written and verbal English communication skills.

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