JEFE / A PRODUCCION

Chipright; Madrid; Presencial; EUR 60.000 - 85.000; Jornada completa

Descripción de la vacante

A leading company in the semiconductor industry is seeking a Senior Analog Mixed Signal Design Engineer to join their R&D team in Madrid. The successful candidate will lead the design of innovative mixed-signal products, requiring deep expertise in Analog Mixed Signal Design and a strong educational background in Electronic Engineering. Key responsibilities include full-cycle design and development tasks, ensuring products meet high-quality standards in performance and verification.

Formación

• At least 5 years of experience in Analog Mixed Signal Design.
• Experience working on blocks such as ADCs, DACs, and PLLs.
• Experience in designing full-custom analog IP blocks in sub-nanometric CMOS technology.

Responsabilidades

• Define, design, and develop future products in Mixed-Signal IC Design.
• Deliver successful designs in silicon, including product definition and qualification.
• Conduct design from schematic to full verification at extracted level.

Conocimientos

Analog Mixed Signal Design

High Speed Communications

Full-custom analog layout techniques

CAD tools (Cadence, Synopsys)

Design verification

English communication

Educación

Degree in Electronic Engineering

Master in Electronic Engineering

PhD in Electronic Engineering

Descripción del empleo

Senior Analog Mixed Signal Design Engineer

Chipright is looking for a Senior Mixed-Signal IC Design Engineer. As a member of the mixed-signal design team in the R&D department of the company, you will be a key part in the definition, design, and development of the future products of the company.

Requirements :

• Degree / Master / PhD in Electronic Engineering.
• At least 5 years of experience in Analog Mixed Signal Design, specifically in High Speed Communications.
• Experience working on blocks such as ADCs, DACs, and PLLs.
• Experience in delivering successful design in silicon : product definition, characterization, qualification, and productization.
• Experience on designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm or below), as well as with analog and mixed-signal IC design tools, such as Cadence or Synopsys.
• Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes.
• Good knowledge of full-custom analog layout techniques, including the ability to review the work of others.
• Excellent written and verbal English communication skills.

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