JEFE / A PRODUCCION

Chipright; Alicante; Presencial; EUR 50.000 - 80.000; Jornada completa

Descripción de la vacante

Chipright is seeking a Senior Analog Mixed Signal Design Engineer to join their R&D department. The role involves defining and developing future mixed-signal products, requiring expertise in analog design, CMOS technology, and effective collaboration skills in a dynamic environment.

Formación

• At least 5 years of experience in Analog Mixed Signal Design.
• Experience with ADCs, DACs, PLLs, and CMOS technology (65nm or below).
• Excellent communication skills in English.

Responsabilidades

• Participate in defining, designing, and developing mixed-signal products.
• Design of analog and mixed-signal blocks in nanometric CMOS processes.
• Review layout work and ensure successful design transitions from definition to productization.

Conocimientos

Analog Mixed Signal Design

High Speed Communications

Silicon Design

Analog and Mixed-Signal IC Design

English Communication

Educación

Degree in Electronic Engineering

Master's or PhD in Electronic Engineering

Herramientas

Cadence

Synopsys

Descripción del empleo

Senior Analog Mixed Signal Design Engineer

Chipright is looking for a Senior Mixed-Signal IC Design Engineer. As a member of the mixed-signal design team in the R&D department of the company, you will be a key part in the definition, design, and development of the future products of the company.

Requirements :

• Degree / Master / PhD in Electronic Engineering.
• At least 5 years of experience in Analog Mixed Signal Design, specifically in High Speed Communications.
• Experience working on blocks such as ADCs, DACs, and PLLs.
• Experience in delivering successful design in silicon : product definition, characterization, qualification, and productization.
• Experience on designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm or below), as well as with analog and mixed-signal IC design tools, such as Cadence or Synopsys.
• Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in nanometric CMOS processes.
• Good knowledge of full-custom analog layout techniques, including the ability to review the work of others.
• Excellent written and verbal English communication skills.

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