Digital Verification Intern

Monolithic Power Systems, Inc.; Barcelona; Presencial; EUR 18.000 - 26.000; Jornada completa

Descripción de la vacante

Monolithic Power Systems, Inc. in Barcelona, Spain invites a Digital Verification Engineer Intern to validate, simulate, and verify digital and mixed-signal ICs using ASIC tools.

You will interact with Senior Digital and Analog Engineers to develop system-level and behavioral models, write tests, and automate verification tasks. Requirements include a Bachelor’s or Master’s in Electrical Engineering with emphasis in Digital Design or VLSI, knowledge of SystemVerilog/UVM, and scripting abilities

Formación

• Degree in Electrical Engineering or related field; emphasis in digital design.
• Required familiarity with ASIC development processes and digital design techniques.
• Strong written and verbal communication; teamwork.
• Knowledge of DV languages (SystemVerilog, UVM) and RTL coding.

Responsabilidades

• Assist in creating Digital Verification environments with UVM and SystemVerilog.
• Write digital and mixed-signal test cases and assertions/checkers.
• Analyze and debug test results, coverage, and functional coverage.
• Support Verification IPs, tests, environments, and checkers.
• Assist with Test Plan generation from design requirements and datasheets.
• Collaborate with Senior Digital/Analog Engineers to model systems.
• Automate tasks and scripting; Gate-Level verification.

Conocimientos

SystemVerilog

UVM

RTL coding

Digital Design

Teamwork

Educación

Bachelor's or Master's in Electrical Engineering

Herramientas

Python

TCL

C/C++

Descripción del empleo

MonolithicPowerSystems,Inc.(MPS)isoneofthefastestgrowingcompaniesintheSemiconductorindustry.WeareworldwidetechnicalleadersinIntegratedPowerSemiconductorsandSystemsPowerdeliveryarchitectures.AtMPS,wecultivatecreativity,arepassionateaboutsustainability,andarecommittedtoprovidingleading-edgeproductsandinnovationtoourcustomers.Ourportfoliooftechnologyhelpspowerourworld—comejoinourteamandseehowYOUcanmakeadifference.

Job Description:

A Digital Verification Engineer Intern to validation, integration, simulation, debugging and verification of digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. Products to be designed/verified may include power management, signal management and mixed signal functions.

Task:

• Assist with the creation of Digital Verification environments with UVM and SystemVerilog.
• Write Digital and Mixed-Signal testcases and assertions/checkers.
• Analyze and debug test results, code coverage and functional coverage.
• Support on Verification IPs and standard tests, environments, checkers, etc.
• Assist with Test Plan generation based on design requirements and product datasheets of digital / mixed-signal IC’s.
• Close interaction with Senior Digital Design, Digital Verification and Analog Design Engineers to develop System Level and Behavioral Models.
• Automation and scripting.
• Gate-Level verification.

Qualifications:

• Bachelor/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework.
• Has the ability to follow instructions/tasks according to design specifications/procedures.
• Basic knowledge of ASIC development process and digital design techniques.
• Good written/verbal communication skills and strong team work/collaboration.
• Knowledge of standard DV languages (SystemVerilog, UVM) and behavioral/RTL coding.
• Executing tasks that hit project milestone.
• Knowledge/Experience with the following is a plus:
  • SCAN and Other DFT Techniques.
  • Knowledge of power management industry/applications.
  • I2C, I3C, SPI, USB, PMBUS.
  • Scripting and automation languages like TCL, Python and C/C+

Location

Barcelona, Spain

Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.