¡Activa las notificaciones laborales por email!

Digital IP Architect

beBeeVerification

Torrejón de Ardoz

Presencial

EUR 45.000 - 70.000

Jornada completa

Hace 30+ días

Descripción de la vacante

A leading technology company is looking for a verification engineer with expertise in ASIC verification to join their team. The successful candidate will design reusable testbenches, collaborate with designers, and enhance the verification process. This role is ideal for a proactive engineer passionate about digital IP solutions.

Formación

  • 5+ years of experience in ASIC verification.
  • Deep knowledge of SystemVerilog and UVM methodology.
  • Familiarity with simulation tools and scripting languages.

Responsabilidades

  • Create verification plans and testbenches using SystemVerilog / UVM.
  • Collaboration with RTL designers to resolve bugs and improve design quality.
  • Participate in continuous improvement initiatives in the verification process.

Conocimientos

ASIC verification
SystemVerilog
UVM methodology
Python
Perl
formal verification

Herramientas

VCS
Questa

Descripción del empleo

As a key member of our team, you will be responsible for designing and developing next-gen digital IP.

This role requires expertise in creating reusable, scalable testbenches and validating complex SoCs using UVM methodology.

Key Responsibilities :

  • Create verification plans and testbenches using SystemVerilog / UVM.
  • Develop assertions, coverage models, and reusable components.
  • Collaborate closely with RTL designers and architects to resolve bugs and improve design quality.
  • Participate in continuous improvement initiatives to enhance the overall verification process.

Requirements :

  • 5+ years of experience in ASIC verification.
  • Deep knowledge of SystemVerilog and UVM methodology.
  • Familiarity with simulation tools (e.g., VCS, Questa) and scripting languages (Python, Perl).
  • Good understanding of formal verification or coverage-driven techniques is a plus.

About the Role :

We are seeking an experienced verification engineer to join our world-class team. If you have a strong background in ASIC verification and are passionate about designing innovative digital IP solutions, we encourage you to apply.

J-18808-Ljbffr

Consigue la evaluación confidencial y gratuita de tu currículum.
o arrastra un archivo en formato PDF, DOC, DOCX, ODT o PAGES de hasta 5 MB.