Company : INTERA, IC Design Unit
Position : Digital IC Design Engineer – ASIC Flow
Location : Barcelona
About INTERA Group :
NVISION and SENSING & CONTROL lead IoT-focused R&D from concept to market. Our IC Design Unit drives innovation, delivering cutting-edge integrated circuits across domains such as Digital Health, Smart Energy, Smart Buildings, Logistics, and Industrial Systems. We pride ourselves on high standards of quality, performance, and reliability.
We are seeking an experienced and technically skilled engineer to strengthen our Edge Computing team. The ideal candidate will carry our code through the full ASIC design and implementation process. Joining our IC Design Unit means becoming part of a dynamic team committed to technical excellence and innovation.
Key Responsibilities:
- Design, implement, debug, and optimize RTL code (Verilog / VHDL) for digital integrated circuits targeting edge computing applications (DSP and AI).
- Integrate hardware accelerators, memory-mapped interfaces, and custom instructions on RISC-V systems.
- Develop RISC-V firmware and low-level drivers (Embedded C) to test hardware accelerators and peripherals.
- Drive the RTL-to-GDSII flow, ensuring successful integration of RTL code into tape-out-ready ASICs.
- Collaborate with system architects and digital designers to optimize microarchitectures for performance, area, and power.
- Manage synthesis, static timing analysis (STA), formal verification, and logic equivalence checking (LEC).
- Interface with backend teams on floorplanning, place and route (P&R), and DFT.
- Support lab bring-up and silicon validation of fabricated chips.
- Contribute to continuous improvement of internal IC design methodologies and flows.
Required Profile and Skills:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- Proficiency in SystemVerilog, Verilog, and other hardware description languages.
- Familiarity with industry-standard tools (e.g., Cadence, Synopsys, Mentor Graphics).
- Knowledge of low-power design techniques, DFT, and physical design constraints.
- Experience with integration and verification flows is a plus.
- Strong debugging and problem-solving skills.
- Experience with scripting languages (Python, Perl, TCL) for automation.
- Advanced knowledge of at least one Hardware Description Language, preferably SystemVerilog.
- Experience with ASIC digital design flow: specifications, RTL verification, synthesis, power estimation.
- Good knowledge of modern microarchitectures, preferably RISC-V, and embedded C for driver and firmware development.
- Soft skills: strong communication, teamwork, analytical mindset, initiative to improve processes.
- Experience with EDA tools/platforms such as Xilinx / Altera, AI knowledge, RTOS, Embedded Linux, and UVM is a plus.
Why Join Us?
- Work on impactful projects in digital health, smart infrastructure, and industrial automation.
- Use state-of-the-art tools in a full ASIC design environment.
- Enjoy flexible working conditions and continuous learning opportunities.
- Be part of a collaborative, innovative, and mission-driven culture.
INTERA actively promotes gender equality, diversity, and inclusion. We foster a workplace where everyone feels valued, respected, and empowered. Our flexible approach to on-site and remote work supports personal and professional needs.