Modeling Engineer

Kandou Ai; Deutschland; Vor Ort; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Kandou is seeking an experienced analog IC design and modelling engineer to design circuit models and verify performance across abstraction levels. You will drive sub-block specifications from architecture and system models, delivering high-quality, validated results.

You'll model using VerilogA/SystemVerilog, Python or Matlab, automate simulations with Ocean/MDL, and work with Cadence tools while communicating clearly with leads and cross‑functional teams throughout the design cycle.

Qualifikationen

• Minimum 7+ years of relevant industry experience in analog IC design and modelling.
• Experience modelling analog circuits using VerilogA, SystemVerilog, Python or Matlab.
• Familiar with Cadence analog design EDA tools.
• Experience using Ocean and MDL to automate analog simulations to extract circuit performance.
• Strong communications and presentations skills suited to interfacing with internal and external customers.
• An autonomous self-starter that is also a team player.

Aufgaben

• Design circuit models with abstraction levels from mathematical description to back extracted circuit performance that allow trade off of simulation time versus accuracy.
• Delivery of circuit models that generate sub-block circuit specifications from architecture specification and system models.
• Verify post-layout sub-blocks deliver specified, modelled performance.
• Ability to communicate effectively with technical leads, designers and system modelling team, throughout the design process, to optimize block specifications and performance and to ensure system modelling is accurate.
• Document and present performance of modelled sub-circuits at various phase gates through the design cycle.
• Documentation of modelling methodology and correlation of the abstraction levels with each other and with analog circuit simulations.
• Innovate and deliver creative modelling solutions for analog circuits.
• Rigorous approach focused on delivering high quality results using Kandou's design process flow.

Kenntnisse

Analog IC design

Circuit modelling

VerilogA/SystemVerilog

Python/Matlab

Cadence tools

Ocean/MDL

Communication skills

Autonomous self-starter

Team player

Ausbildung

B.Eng. or higher in Electrical Engineering / Microelectronics

Tools

Cadence analog design tools

Ocean/MDL

Jobbeschreibung

We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of customers reads like a who's who of the technology world. If you love to be part of a start-up that is challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you.

Role responsibilities

• Design circuit models with abstraction levels from mathematical description to back extracted circuit performance that allow trade off of simulation time versus accuracy
• Delivery of circuit models that generate sub-block circuit specifications from architecture specification and system models
• Verify post-layout sub-blocks deliver specified, modelled performance
• Ability to communicate effectively with technical leads, designers and system modelling team, throughout the design process, to optimize block specifications and performance and to ensure system modelling is accurate
• Document and present performance of modelled sub-circuits at various phase gates through the design cycle
• Documentation of modelling methodology and correlation of the abstraction levels with each other and with analog circuit simulations
• Innovate and deliver creative modelling solutions for analog circuits
• Rigorous approach focused on delivering high quality results using Kandou's design process flow.

Competencies

• Minimum 7+ years of relevant industry experience in analog IC design and modelling
• Hands on experience in analog circuit design and modelling of high frequency circuits
• Experience modelling analog circuits using languages such as VerilogA, SystemVerilog, Python or Matlab
• Familiar with Cadence analog design EDA tools
• Experienced using Ocean and MDL to automate analog simulations to extract circuit performance
• Strong communications and presentations skills suited to interfacing with internal and external customers
• An autonomous self-starter that is also a team player
• B.Eng. or equivalent (or higher) degree in Electrical Engineering / Microelectronics