IP Verification Engineer

Codasip; München; Hybrid; EUR 70.000 - 90.000; Vollzeit

Benefits dieser Stelle

Flexible work environment

Cutting-edge technology projects

Zusammenfassung

An innovative processor solutions company in Munich is seeking an experienced IP Verification Engineer to join their Labs team. You will be involved in verifying digital IP blocks and validating functionalities for application-specific platforms, engaging in projects focused on high-bandwidth MEMS microphones. Ideal candidates should be skilled in hardware verification and familiar with FPGA platforms. This role offers flexible remote options within Germany.

Qualifikationen

• Experience with hardware verification.
• Knowledge of HDL languages.
• Ability to test and debug complete systems.

Aufgaben

• Verify IP blocks using SystemVerilog UVM test benches.
• System-level validation of FPGA platforms.
• Test FPGA platform before release.

Kenntnisse

Hardware verification (VHDL/Verilog simulation, formal or UVM)

HDL languages (Verilog, VHDL, SystemVerilog)

Versioning tools (Git)

Testing and debugging systems on FPGA

Familiarity with Xilinx/AMD FPGA platforms

Excellent English communication skills

Tools

Vivado

QuestaSim

Verilator

Jobbeschreibung

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Recruitment Lead at Codasip/RISC-V processor IPs/Processor design/CPU Design and Verification

Why we are hiring

We’re looking for an IP Verification and System Validation Engineer to join our Labs team and be part of realizing a whole new paradigm in semiconductors and microprocessor design. The role is wide and varied and involves the verification of digital IP blocks and internal validation of their functionality as part of an application-specific platform. The first project you will be involved with is an EU-funded project called Listen2Future, where we are tasked with developing a secure platform on FPGA that includes many IP blocks developed in-house. The project is focused on developing and using high-bandwidth MEMS microphones for various applications, including medical monitoring and predictive maintenance within critical national infrastructure.

We evaluate new technology that shows commercial potential and evolve that technology to the point where it can be made into a product. As part of this journey, we design IP and build FPGA platforms in order to create proof-of-concepts and technology demonstrators. Where appropriate, we take the selected IP further to become an ASIC-quality product.

The role demands flexibility, determination, and lateral thinking.

• Department: Labs
• Employment: Full-time
• Experience level: Mid-Senior
• Location of work is Munich, or full remote from Germany
• Please note this role is only open to candidates with working rights in Germany

What will you do?

• Verify IP blocks using standard SystemVerilog UVM test benches
• System-level validation of application-specific FPGA platforms
• Testing the whole FPGA platform before release to customers or other partners in the project.

The following skills are essential to perform the job duties:

• Experience with hardware verification (VHDL/Verilog simulation, formal or UVM)
• Knowledge of HDL languages (Verilog, VHDL, or SystemVerilog)
• Active usage of versioning tools (Git -preferred)
• Ability to test and debug complete systems running on an FPGA platform
• Familiarity with Xilinx/AMD FPGA platforms, Vivado, and simulation tools like QuestaSim or Verilator
• Excellent English communication skills. English. Our team is highly distributed, so English is the primary language

The following skills and experience are nice to have:

• Technical background in FPGA system prototyping and debug
• Embedded software development in C/C++
• Experience with software automation
• Familiarity with common lab equipment (oscilloscopes, protocol analyzers, etc.)
• Knowledge of RISC-V

About Codasip

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.

What's in it for you?

As well as joining a flexible, open, and supportive team full of curious, self-motivated, and driven engineers who are keen to explore new ways of doing things, you'll get to work on ultra-modern, cutting-edge products and technology. Most of the projects on this team follow the whole development lifecycle, from early prototyping to final production, as well as collaborating with other engineers across the company.

We're passionate about RISC-V processors and are in tune with the times! If you are, apply now :)

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  Semiconductor Manufacturing

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