Expert Digital ASIC Design Engineer (m/f/d)

Advantest; Böblingen; Vor Ort; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Advantest is seeking an Expert Digital ASIC Design Engineer in Böblingen to lead end-to-end digital module development—from concept to silicon in the final system. You will work with system architects, software, and product marketing and mentor junior engineers.

The role emphasizes RTL coding in Verilog, verification, documentation, and collaboration across disciplines to deliver high-quality results on schedule.

Qualifikationen

• University degree in EE or equivalent required.
• Expert background in digital design (SOC), ASIC design methodologies and silicon development cycle.
• Experience in RTL coding (Verilog).
• Experience with standard digital simulation tools.
• Basic knowledge of UNIX/Linux and programming languages.
• Strong communication, teamwork and problem-solving skills.
• Proficient in English.

Aufgaben

• Requirements gathering and elicitation for devices and IP.
• Architecture development for CMOS designs.
• Design and RTL coding of digital modules.
• Verification on module and chip level including test plans.
• Documentation of architecture and implemented functionality.
• Support for floor-planning and physical design.
• Mentoring Junior Engineers.
• Collaboration with other functions.

Kenntnisse

Digital ASIC design

RTL coding

English language skills

Teamwork

Problem solving

Ausbildung

University degree in EE

Tools

Verilog

Jobbeschreibung

Expert Digital ASIC Design Engineer (m/f/d)

Location: Böblingen, Germany

Join a global, highly skilled engineering team at the heart of Advantest's cutting edge IC test solutions. As an Expert Digital ASIC Design Engineer, you will help create the key technologies that enable the next generation of semiconductor testing. You will work on complex mixed signal ASICs used in Advantest's industry leading testers, taking digital modules and subsystems from first concept all the way to silicon in the final system, giving you true end to end ownership. In this role, you will collaborate closely with system architects, software engineers, product marketing, and other engineering disciplines. In addition, mentoring junior engineers is a must. You will translate requirements into robust architecture, refine designs, solve challenging technical problems, and deliver high quality results on schedule and at scale.

Job Duties & Responsibilities

• Requirements gathering and elicitation for devices and IP
• Architecture development for CMOS designs
• Design and RTL coding of digital and full-custom modules
• Verification on module and chip level including test plan/cases generation
• Documentation of architecture and implemented functionality
• Support for floor-planning and physical design
• Mentoring Junior Engineers
• Collaboration with other functions

Qualifications

• University degree, Diploma or BS in EE
• Expert background in digital design (SOC), ASIC design methodologies and silicon development cycle
• Experience in Register Transfer Level (RTL) coding (Verilog)
• Experience with standard simulation tools for digital designs
• Basic knowledge about UNIX or Linux environment and using programming languages
• Technical communication, team work and problem solving skills
• English language skills