Senior Verification Engineer

TN Switzerland; Zürich; Hybrid; CHF 90’000 - 130’000; Vollzeit

Zusammenfassung

An established industry player is seeking a Senior Verification Engineer to contribute to innovation in wireless communication. This role offers the chance to work on complex signal processing IPs, utilizing SystemVerilog and UVM methodologies to develop cutting-edge verification environments. You'll collaborate with cross-functional teams to ensure high-quality verification standards and enhance processes with EDA tools and scripting languages. If you're passionate about advancing your career in a dynamic environment, this opportunity could be the perfect fit for you.

Qualifikationen

• Experience in IP verification and debugging complex signal processing IPs.
• Strong background in wireless communication and digital signal processing.

Aufgaben

• Debug complex signal processing IPs, including Bluetooth and WiFi.
• Develop verification environments using SystemVerilog and UVM methodologies.

Kenntnisse

IP verification

Debugging complex signal processing IPs

Wireless communication

Digital signal processing

SystemVerilog

UVM

Object-oriented programming

Scripting languages

Tools

EDA tools

Jobbeschreibung

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Senior Verification Engineer

Location: Zurich, Switzerland (Hybrid)

Are you an experienced Senior Verification Engineer looking for a new opportunity in the field of wireless communication?This is an excellent opportunity for a motivated professional to take the next step in their career on the technical ladder, contributing to innovation, problem-solving, and thought leadership.

Key Responsibilities:

• Debug complex signal processing IPs, including Bluetooth and WiFi.
• Work on wireless communication systems and digital signal processing.
• Develop verification environments using SystemVerilog and UVM methodologies.
• Utilise EDA tools and scripting languages to enhance verification processes.
• Collaborate with cross-functional teams to ensure high-quality verification standards.

Requirements:

• Key experience in IP verification.
• Strong expertise in debugging complex signal processing IPs.
• Background in wireless communication and digital signal processing.
• Proficiency in SystemVerilog andUVM.
• Strong programming skills in object-oriented and scripting languages.

If you are a Senior Verification Engineer passionate about cutting-edge verification methodologies and new IP development, apply today or contact Lucy Edmondson at IC Resources.