Senior Digital Payload Systems Architect (FPGA/ASIC)

Viasat; Lausanne; Vor Ort; CHF 140.000 - 190.000; Vollzeit

Zusammenfassung

Viasat is seeking an experienced Digital Payload Systems Engineer in Lausanne to lead end-to-end digital payload architecture, performance, requirements, and verification. You will act as a senior technical authority on FPGA/ASIC based digital systems, guiding architecture decisions and cross-functional coordination while mentoring other engineers.

Ideal candidates bring 8+ years in systems engineering for aerospace or mission-critical systems, with deep expertise in FPGA/ASIC, DSP, high-speed

Qualifikationen

• Bachelor's degree in Engineering, Physics, Computer Engineering, Electrical Engineering, or related field.
• 8+ years of systems engineering, digital payload development, FPGA/ASIC based systems, aerospace or mission-critical environments.
• Ability to independently define complex technical problems and drive resolution across teams.
• Experience owning payload or system-level budgets for performance, latency, throughput, and risk.
• Strong requirements development, decomposition, allocation, traceability, and verification closure.
• Lifecycle experience from concept through integration, verification and operation readiness.
• Significant FPGA/ASIC architecture or implementation experience.
• Proficiency with DSP, communication systems, high-speed digital interfaces, and payload data path.

Aufgaben

• Own end-to-end digital payload system performance, architecture, requirements, and verification strategy.
• Lead architecture definition and trade studies for FPGA, ASIC, DSP, high-speed I/O, clocking, and payload processing systems.
• Define and resolve complex system-level problems across hardware, firmware, software, RF, integration, and test teams.
• Drive design decisions for beamforming, channelization, regenerative payloads, and standards-based implementations including DVB-S2, DVB-S2X, DVB-RCS, and 3GPP.
• Own technical budgets, margin posture, assumptions, risks, and analytical models supporting program decisions.
• Develop and maintain key technical artifacts, including SRDs, TRDs, interface specifications, trade studies, and verification plans.
• Lead requirements decomposition, allocation, traceability, and burndown across subsystem teams.
• Support major lifecycle reviews including SRR, PDR, CDR, test readiness, and operational readiness reviews.
• Define system-level verification and validation strategies with integration and test teams.
• Provide technical leadership on interfaces, timing, throughput, resource utilization, high-speed data movement, and payload processing behavior.
• Communicate technical recommendations, risks, and tradeoffs to engineering and program leadership.
• Mentor engineers and help improve systems engineering practices, standards, and digital payload development processes.

Kenntnisse

FPGA Architecture

ASIC Architecture

DSP Algorithms

High-speed Interfaces

SystemVerilog

VHDL

Verilog

Technical Leadership

Ausbildung

Bachelor's degree in Engineering/related technical field

Tools

VHDL

Verilog

SystemVerilog

Jobbeschreibung

Viasat is seeking an experienced Digital Payload Systems Engineer in Lausanne to lead end-to-end digital payload architecture, performance, requirements, and verification. You will act as a senior technical authority on FPGA/ASIC based digital systems, guiding architecture decisions and cross-functional coordination while mentoring other engineers.

Ideal candidates bring 8+ years in systems engineering for aerospace or mission-critical systems, with deep expertise in FPGA/ASIC, DSP, high-speed