Intern: Digital IC Design for Low-Power SoCs & FPGA

Onsemi; Schweiz; Remote; CHF 20.000 - 27.000; Vollzeit

Zusammenfassung

onsemi in Marin, Switzerland offers a six-month internship to a highly motivated Electrical Engineering student. As an intern, you will simulate and evaluate state-of-the-art microcontrollers, and you will have the opportunity to build your own MCU subsystem and to verify and program it in C/C++ on FPGA.

You will contribute to the design and optimization of digital architectures for low-power SoCs, develop RTL modules using SystemVerilog/Verilog, and participate in integration with

Qualifikationen

• Currently enrolled in a Master’s program in Electrical Engineering or a related field.
• Knowledge in digital IC design and computer architecture.
• Experience with HDL languages (Verilog/SystemVerilog/VHDL) for RTL design.
• Understanding of topics such as pipelining, memory hierarchies, low‑power design, and digital system integration.
• Familiarity with simulation and verification methodologies.
• Basic knowledge of FPGA prototyping flows is a plus.
• Strong team player with a collaborative mindset.
• Eligibility to work in Switzerland.

Aufgaben

• Contribute to the design and optimization of digital architectures for low‑power SoCs
• Develop and implement RTL modules using SystemVerilog/Verilog
• Perform functional simulation, verification, and debugging of digital designs
• Participate in integration of digital subsystems within a larger SoC environment
• Support FPGA-based prototyping and validation of digital designs
• Collaborate with cross-functional teams including verification, physical design, and system architects

Jobbeschreibung

onsemi in Marin, Switzerland offers a six-month internship to a highly motivated Electrical Engineering student. As an intern, you will simulate and evaluate state-of-the-art microcontrollers, and you will have the opportunity to build your own MCU subsystem and to verify and program it in C/C++ on FPGA.

You will contribute to the design and optimization of digital architectures for low-power SoCs, develop RTL modules using SystemVerilog/Verilog, and participate in integration with