SoC Scan & ATPG Engineer (DFT)

Advanced Micro Devices, Inc.; Ottawa; On-site; CAD 90,000 - 130,000; Full time

Job summary

Advanced Micro Devices, Inc. seeks an experienced engineer to drive end-to-end SoC-level scan insertion, DFT implementation, and ATPG execution. You will develop and optimize scan architectures, analyze coverage, and collaborate with design, verification, and CAD teams to improve test quality and manufacturability.

The role emphasizes strong fundamentals in DFT, ATPG, and digital design, with hands-on scripting and debugging across multi-disciplinary teams.

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering or related field.
• Experience with DFT, ATPG, and test methodologies for SoCs.
• Familiarity with Verilog/SystemVerilog and digital design flows.

Responsibilities

• Drive end-to-end SoC-level scan insertion, DFT implementation, and ATPG execution.
• Develop and optimize scan architectures, scan chains, test compression, and ATPG strategies.
• Analyze scan coverage and ATPG results to improve test quality and coverage.
• Collaborate with design, verification, physical design, CAD, and product engineering teams.

Skills

DFT fundamentals

ATPG

Scan insertion

Digital design

Verilog/SystemVerilog

Python scripting

Collaboration

Troubleshooting

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Verilog

SystemVerilog

Job description

Advanced Micro Devices, Inc. seeks an experienced engineer to drive end-to-end SoC-level scan insertion, DFT implementation, and ATPG execution. You will develop and optimize scan architectures, analyze coverage, and collaborate with design, verification, and CAD teams to improve test quality and manufacturability.

The role emphasizes strong fundamentals in DFT, ATPG, and digital design, with hands-on scripting and debugging across multi-disciplinary teams.