Silicon Design Engineer - Automation

AMD

Markham

On-site

CAD 207,048 - 310,572

Full time

14 days+

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Job summary

A leading semiconductor company in Markham is looking for a Silicon Design Engineer - Automation. This full-time role involves implementing DFT architecture and working closely with senior engineers to ensure silicon success. Candidates should have a degree in Computer or Electrical Engineering and be familiar with test methodologies and design verification tools. The position offers competitive compensation and a stimulating work environment focused on innovation.

Qualifications

Understanding of Design for Test methodologies and DFT verification experience.
Experience with various test patterns and DFT architecture.
Good communication and problem-solving skills.

Responsibilities

Implement and verify DFT architecture and features.
Generate ATPG patterns and verify with gate-level simulation.
Provide post-silicon support to enhance yield.

Skills

Attention to detail

Communication skills

Problem-solving skills

Education

Bachelors or Masters degree in Computer Engineering/Electrical Engineering

Tools

Mentor testkompress

Synopsys Tetramax/DFTMAX

VCS simulation tool

Perl/Shell scripting

Verilog RTL design

Job description

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This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$150,400.00/yr - $225,600.00/yr

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

The Person

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

Key Responsibilities

Implementation and verification of DFT architecture and features
Scan insertion and ATPG pattern generation
ATPG patterns verification with gate-level simulation
Test coverage and test cost reduction analysis
Post silicon support to ensure successful bring up and enhance yield learning

Preferred Experience

Understanding of Design for Test methodologies and DFT verification experience (e.g. IEEE1500, JTAG 1149.x, Scan, memory BIST etc.)
Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

Academic Credentials

Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION: Markham, ON

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Seniority level