DFT Engineer, Principal Toronto, Ontario, Canada Hardware Engineering Posted a day ago

Qualcomm; Toronto; On-site; CAD 140,000 - 190,000; Full time

Job summary

Qualcomm Canada ULC is seeking a DFT Engineer to plan, design, verify, and test electronic systems for next-generation devices. You will develop automated RTL and DFT flows across multiple IPs, ASICs and SoCs, and collaborate with cross-functional teams to meet performance targets.

Applicants should have extensive RTL/DFT experience, proficiency with Verilog/VHDL/SystemVerilog, and familiarity with DFT standards, ATPG, and EDA tools.

Qualifications

• Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science is required.
• 10+ years of hardware engineering/SoC design experience in RTL/DFT capacity.
• Experience with DFT standards and related EDA tools is essential.

Responsibilities

• Develop, maintain and support DFT flows across company projects.
• Architect RTL-centric DFT environments for IPs, ASICs, and SoCs.
• Write and automate RTL for advanced DFT/DFD features.
• Create automated verification test benches and sequences for DFT IP.
• Build scan insertion flows and ATPG retargeting procedures.
• Write static timing constraints and ensure timing checks.

Skills

Automation

RTL design

Test experience

Problem solving

Education

Bachelor's degree in Engineering or related field

Master's degree in Engineering or related field

PhD in Engineering or related field

Tools

Verilog/VHDL/SystemVerilog

DFT EDA tools (Siemens, SNPS, Cadence)

JTAG/iJTAG/BIST knowledge

Python/TCL scripting

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm DFT Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

What You'll Do

• Acting as a member of Qualcomm's central DFT methodology group responsible for developing, maintaining and supporting flows across all company business units and projects
• Architecting methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, ASICs and SoC designs.
• Writing and automating RTL for advanced DFT and DFD features not currently supported by the EDA vendors
• Developing automated verification test bench and sequence creation for DFT IP. Architecting end-2-end verification solutions from static design checks, through formal and sequence-based verification.
• Building IP/block and SoC level scan insertion flows and scripting ATPG retargeting procedures. Creating automated QoR checks for implementation quality control.
• Writing static timing constraints, creating waivers and devising flows for bullet proof timing checks.
• New Position

What You'll Need:

• Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science
• 10+ years of experience in complex SoC designs in RTL, DFT or FE capacity. Candidates with less experience may be considered for other senior technical roles.
• Vast experience with various DFT EDA tools from Siemens, SNPS and Cadence
• Good knowledge and understanding in Verilog/VHDL and SystemVerilog
• Exposure to CAD and automation. Good exposure for using de-Perl techniques in creating generic codes. Knowledge of TCL and Python is a plus.
• Extensively experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687) and BIST techniques (memory BIST, logic BIST, interconnect BISTs)
• Track record in integrating custom made DFT logic for complex SoCs (System-On-Chip) and CoWoS (Chip-On-Wafer-On-Substrate) designs is highly desirable.
• Experience in SoC and IP/Block level scan insertion and ATPG, simulation of zero delay and SDF annotated test sequences.

Applicants:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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Contact Information:

If you would like more information about this role, please contact Qualcomm Careers.