Senior SMU Validation Engineer, Data Center GPUs

AMD; Markham; On-site; CAD 120,000 - 180,000; Full time

Benefits offered by this job

AMD benefits

Job summary

AMD is seeking an Lead SMU Validation Engineer in Markham, Ontario to drive hardware and power-management validation for Data Center GPU products. You will own validation planning, triage issues, and lead cross-functional teams across architecture, firmware, and platform engineering.

You will mentor engineers, develop validation plans, and build automation to improve coverage, efficiency, and repeatability in a lab and system context.

Qualifications

• Bachelor’s or master’s degree in Electrical/Computer Engineering or CS.
• Strong experience in SoC power-management validation and SMU hardware.
• Ability to plan validation, triage issues, and lead cross-functional teams.
• Proficiency in Python and C/C++ for automation and debug.
• Familiarity with Linux, hardware debugging, and platform tools.
• Experience with emulation, simulation, or FPGA/prototyping.

Responsibilities

• Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.
• Develop validation plans for SMU sub-blocks and power-management features, including bootcode, clocking, fuse, SMN, SMUIO, thermal, RSMU, security interactions.
• Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.
• Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.
• Build and improve automation, validation content, debug-analysis scripts, and regression checks to improve coverage, efficiency, and repeatability.
• Review RTL, specifications, firmware interfaces, register maps, and validation collateral to identify coverage gaps and improve validation effectiveness.
• Support lab-based and system-level debug using platform tools, firmware logs, register-level analysis, and standard measurement equipment.
• Support customer and sustaining issues by providing SMU technical expertise, debug guidance, and issue-resolution support.
• Mentor engineers and help improve team validation methodology, debug practices, and product quality.

Skills

SoC power-management validation

SMU hardware features

Firmware interactions

System-level debug

Python

C/C++

Linux

Emulation/FPGA

Education

Bachelor’s or Master’s degree in Electrical Engineering / Computer Engineering / CS

Tools

Emulation tools

Job description

AMD is seeking an Lead SMU Validation Engineer in Markham, Ontario to drive hardware and power-management validation for Data Center GPU products. You will own validation planning, triage issues, and lead cross-functional teams across architecture, firmware, and platform engineering.

You will mentor engineers, develop validation plans, and build automation to improve coverage, efficiency, and repeatability in a lab and system context.