Post-Silicon Validation Design Lead

AMD; Vancouver; On-site; CAD 110,000 - 190,000; Full time

Job summary

AMD is seeking a Validation Design Manager to lead the NBIO team in Markham/Vancouver, driving high-quality IP silicon validation and on-time releases. You’ll mentor engineers, collaborate with senior staff, and shape validation strategies across multiple programs.

You’ll enable post-silicon debugging, coordinate with platform, firmware, and ATE teams, and foster continuous improvement while delivering robust validation plans in a dynamic, fast-paced environment.

Qualifications

• Management or technical leadership experience
• Knowledge of computer hardware architecture (CPU/APU, x86, PCIe, memory, bus logic) and software architecture (driver, bios, firmware usage)
• Familiar with high-speed I/O technologies and protocols
• Experience developing validation methodologies and infrastructure.
• Test plan and test development experience
• Participated in silicon bring up and debug, support to internal engineering teams.
• Able to execute and drive success of programs with multiple projects on the go.
• Debug skills at IP/system level
• Excellent organizational and communication skills
• Passion to win; drive to make a difference
• Ability to function (thrive) in a dynamic environment
• Knowledge of tools of the trade; Office365, issue ticket systems, web-based collaborative tools
• IP or SOC design or validation background preferred
• Demonstrate diligence, leadership, and judgment
• Excellent interpersonal skills

Responsibilities

• Lead a team of engineering staff, manage assignment, monitor workload, and drive post-Si activities.
• Be able to work in a high demand, fast paced environment with multiple real-time problem solving and critical thinking.
• Deploy post-silicon debug infrastructure (software, hardware, automation environment, and lab setup)
• Lead collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives.
• Create plans for IP validation execution
• Establish deliverable requirements, milestones, and metrics
• Track execution/debug progress
• Determine and align schedules with peer groups and internal customers
• Implement change control and issue management processes
• Coordinate with Debug, Platform, FW, and ATE validation teams on plans and execution
• Provide status and issue updates to internal managers and program leadership
• Drive continuous improvement and lessons learned

Skills

Team leadership and mentoring

Hardware architecture knowledge

Software architecture knowledge

High-speed I/O protocols

Validation methodologies and infra

Test planning/development

Silicon bring-up and debugging

Program/job management

IP/system level debugging

Organizational and communication

Winning mindset and impact

Dynamic environments adaptability

Office365 and ticketing tools

IP or SOC design/validation background

Diligence, leadership and judgment

Interpersonal skills

Education

Bachelor or Masters in Electrical Engineering or equivalent

Tools

Office365

Issue tracking systems

Web-based collaboration tools

Job description

AMD is seeking a Validation Design Manager to lead the NBIO team in Markham/Vancouver, driving high-quality IP silicon validation and on-time releases. You’ll mentor engineers, collaborate with senior staff, and shape validation strategies across multiple programs.

You’ll enable post-silicon debugging, coordinate with platform, firmware, and ATE teams, and foster continuous improvement while delivering robust validation plans in a dynamic, fast-paced environment.