Senior Design Engineer

Net2Source (N2S); Markham; On-site; CAD 90,000 - 120,000; Full time

Job summary

Net2Source (N2S) in Ontario is seeking an RTL Design Engineer to contribute to RTL design using Verilog HDL for implementation and debugging, read and comprehend SoC level architectural specifications, and write microarchitecture specifications for new and modified functions.

This role involves linting and simulation of designs, collaborating with synthesis and backend teams for physical implementation, and some IP work.

Qualifications

• Proven experience RTL design using Verilog HDL for implementation and debug.
• Ability to read and interpret SoC level architectural specifications.
• Experience writing microarchitecture specifications for new or modified functions.
• Familiarity with linting and simulation workflows.

Responsibilities

• Linting and simulation of RTL designs.
• Collaborate with synthesis and backend teams for physical implementation.
• Assist with IP-related work as needed.

Skills

Verilog HDL

RTL Design

SoC Architecture

Microarchitecture Specs

Linting & Simulation

AI Tools

Back-end Collaboration

Infrastructure Basics

Education

Bachelors or Masters in Computer Engineering

Job description

• Responsible for RTL design using Verilog HDL for implementation and debug.
• Read and comprehend System on Chip level architectural specification.
• Write microarchitecture specifications for new and modified functions.
• Responsible for linting and simulation of design.
• Work with synthesis and backend teams for physical implementation.
• RTL Design Engineer to help with some IP work
• Need experience with some AI tools, how to use AI tools to speed up the development
• Basic infrastructure knowledge

EDUCATION:

• Bachelor's or Master's in Computer Engineering.