Senior ASIC Verification Engineer

Myticas Consulting Inc.; Ottawa; On-site; CAD 120,000 - 170,000; Full time

Benefits offered by this job

Restaurant d'entreprise

Indemnités de stage/alternance

Job summary

Myticas Consulting Inc. is seeking a Senior ASIC Verification Engineer in Ottawa to independently drive verification of advanced SoCs using SystemVerilog, UVM, and related methodologies.

You will collaborate with cross-functional teams to deliver high-quality silicon and hardware solutions. Ideal candidates have 8+ years of ASIC/SoC verification experience, strong SystemVerilog/Python skills, and a solid grasp of UVM and SVA, with a Master's degree preferred.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science; Master's degree preferred.
• 8+ years of relevant ASIC/SoC verification experience.
• Strong experience developing verification test plans for complex ASICs at the block or sub-chip level.
• Advanced proficiency in SystemVerilog and Python.
• Strong knowledge of the UVM methodology and SystemVerilog Assertions (SVA).
• Experience with code coverage and formal verification tools.

Responsibilities

• Develop and verify complex SoCs and digital ASIC designs using SystemVerilog and UVM.
• Develop protocol and traffic generators, checkers, and self-checking verification environments.
• Develop and execute comprehensive test plans based on functional requirements and industry standards.
• Define, develop, and execute verification tests for complex digital ASICs at block and sub-chip levels.
• Collaborate with hardware, software, system engineers, suppliers, and other teams to resolve issues.
• Apply functional coverage, code coverage, assertions, and formal verification techniques.

Skills

SystemVerilog

UVM

Python

SystemVerilog Assertions (SVA)

DSP/FEC (asset)

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science

Master's degree preferred

Job description

Senior ASIC Verification Engineer

Role Overview

Work as an independent contributor in the development and verification of advanced SoCs based on the latest ASIC and FPGA technologies. The role involves developing robust verification environments, creating test strategies, and collaborating with cross-functional engineering teams to deliver high-quality silicon and hardware solutions.

Key Responsibilities

• Develop and verify complex SoCs and digital ASIC designs using SystemVerilog and UVM.
• Develop protocol and traffic generators, checkers, and self-checking verification environments.
• Develop and execute comprehensive test plans based on functional requirements and applicable industry standards.
• Define, develop, and execute verification tests for complex digital ASICs at the block and sub-chip levels.
• Collaborate with hardware, software, system engineers, suppliers, and other technical teams to resolve complex technical issues.
• Work closely with subject matter experts across different engineering disciplines to develop competitive and reliable solutions.
• Support hardware and software bring-up, integration, debugging, and issue resolution.
• Apply functional coverage, code coverage, assertions, and formal verification techniques to improve verification quality.
• Contribute independently to assigned projects or provide technical leadership to a verification team when required.
• Help evaluate and implement evolving verification methodologies, tools, and best practices.

Skills and Experience

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline; Master's degree is preferred.
• 8+ years of relevant experience in ASIC or SoC verification.
• Strong experience developing and implementing verification test plans for complex ASICs at the block or sub-chip level.
• Advanced proficiency in SystemVerilog and scripting languages such as Python.
• Strong knowledge and hands‑on experience with the UVM methodology.
• Experience with SystemVerilog Assertions (SVA) and functional coverage.
• Experience with code coverage and formal verification tools.
• Understanding of modern and evolving ASIC/SoC verification methodologies.
• Strong analytical and problem‑solving skills.
• Excellent communication and collaboration skills.
• Ability to work effectively within geographically distributed, cross‑functional engineering teams.
• Experience with DSP and/or FEC is considered an asset.