Senior Analog RF Design Engineer

Ciena Corporation

Ottawa

On-site

CAD 114,000 - 182,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Benefits offered by this job

Medical plan
Dental plan
Vision plan
401K/DCPP with company match
ESPP
Employee Assistance Program

Job summary

Ciena Corporation is seeking a senior RFIC design engineer in Ottawa to contribute to broadband RF driver and transimpedance amplifier development for WaveLogic. You will design RF drivers and TIAs, verify layouts, perform RF and mixed-signal simulations, and lead lab measurements while coordinating with layout and system teams.

The role requires a Master’s in EE and 5–10 years of telecom RF experience, with proficiency in Cadence/AMS, Mentor, HFSS, and related tools.

Qualifications

  • Master's degree in electrical engineering or equivalent.
  • 5–10 years of RF analog circuit development experience for telecom.
  • High-speed RF circuit design experience (e.g., DRA, TIAs, or lumped element amplifiers).
  • Experience with Cadence AMS or Mentor Symphony for simulations.

Responsibilities

  • Design RF drivers, TIAs and related blocks in BiCMOS tech.
  • Collaborate with layout to implement design intent and verify work.
  • Perform layout tasks with Cadence and Mentor tools as needed.
  • Run RF circuit simulations with Cadence tools.
  • Conduct mixed-signal simulations (Cadence AMS).
  • Perform lab measurements for VR, debug, and back-simulations.
  • Communicate requirements to layout and provide feedback to system group.
  • Present reports on design, simulations, and measurements.

Skills

RF circuit design
Mixed-signal simulation
Op-amp design
BiCMOS design
Cadence design flow
3D/2.5D simulation tools
Lab measurement proficiency

Education

Master's degree in Electrical Engineering

Tools

Cadence AMS
Mentor Symphony
HFSS
EMX
Momentum

Job description

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. Dig deeper into who we are, what we do, and what you can expect as a member of our team. Meet the people who are shaping the future of communication and explore the culture we’ve built together at CienaLife. Only trust communications from official Ciena channels—we will never ask for payment during the recruitment process.

What will you do at Ciena?

This individual will contribute to the development of broadband RF driver and transimpedance amplifiers for Ciena’s WaveLogic programs. The candidate will work as part of a larger team and be responsible for design, mixed-signal simulation, lab test and verification of the broadband amplifier ASICs.

Responsibilities
  • Design of RF drivers, TIAs and associated building blocks in BiCMOS technologies
  • Work with layout resources to implement design intent and verify work performed
  • Perform some critical layout when needed using the cadence tool suite (layout L, XL, GXL) and Mentor layout verification tools (Calibre LVS, DRC, PEX, etc.)
  • Perform RF circuit simulations with the Cadence tool suite (virtuoso, ADE, maestro, etc.)
  • Perform mixed-signal simulation with cadence AMS
  • Perform lab measurements for VR, debug and back-simulations
  • Communicate requirements to layout engineers and provide feedback as needed
  • Provide feedback on circuit requirements and work with the system group to find the best compromises
  • Present written reports and presentations at group meetings of work performed (i.e., design, simulations, measurements, etc.)
Must Haves
  • Minimum: Master’s degree in electrical engineering or equivalent
  • A track record of developing RF analog circuits for the telecom industry with 5-10 years of experience
  • High-speed RF circuit design experience including one or more of the following: Distributed RF broadband amplifiers, Lump element RF amplifiers or TIAs
  • Mixed-signal simulation with cadence AMS or Mentor Symphony
  • Op-amp design experience
  • Design experience in BiCMOS
  • Experienced with the Cadence design flow
  • Experienced with 3D and 2-1/2D simulators such as HFSS, EMX, Momentum, etc.
  • On Wafer, die and module testing and debugging using probe stations, VNAs, spectrum analyzers, etc.
Nice to Have
  • Design experience in CMOS and SiGe
Pay Range

The annual salary range for this position in Ottawa is $114,000 - $182,000. Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available. Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission.

Benefits
  • Medical, dental, and vision plans
  • Participation in 401(K) (USA) & DCPP (Canada) with company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company-paid holidays
  • Paid sick leave
  • Vacation time
  • We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.
Equal Opportunity and Diversity Statement

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

Accommodation Statement

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior ASIC Design Engineer - Client IP
Senior ASIC Design Engineer - Client IP

Ciena • Ottawa

On-site
CAD 109,000 - 174,000
Medical Insurance
Dental Insurance
Vision Plans
+7
Senior ASIC Design Engineer - Client IP
Senior ASIC Design Engineer - Client IP

Ciena Corporation • Ottawa

On-site
CAD 109,000 - 174,000
Medical, dental, and vision plans
401(K)/DCPP with company matching
Employee Stock Purchase Program (ESPP)
+2
Mixed Signal Design Engineer
Mixed Signal Design Engineer

Ciena Corporation • Ottawa

On-site
CAD 91,000 - 145,000
Senior Analog Hardware Design Engineer, onsite Kanata
Senior Analog Hardware Design Engineer, onsite Kanata

Ciena Corporation • Ottawa

On-site
CAD 98,000 - 199,000
Senior Physical Design Engineer
Senior Physical Design Engineer

Ciena Corporation • Ottawa

On-site
CAD 109,000 - 174,000
Medical, dental, and vision plans
Employee Stock Purchase Program (ESPP)
401(K) / DCPP with company matching
+3
Senior Analog Layout Engineer
Senior Analog Layout Engineer

Ciena Corporation • Ottawa

Hybrid
CAD 114,000 - 182,000
Medical, dental, and vision plans
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
+3
Senior Analog & Mixed-Signal Modelling Architect
Senior Analog & Mixed-Signal Modelling Architect

Ciena Corporation • Ottawa

On-site
CAD 109,000 - 174,000
Medical, dental, and vision plans
401(K) / DCPP with company matching
Employee Stock Purchase Program (ESPP)
+1
Senior Manager, Layout Design
Senior Manager, Layout Design

Kibbi • Ottawa

On-site
CAD 171,000 - 273,000
Medical plans
401(K) matching
ESPP
+5
Principal Analog Layout Engineer
Principal Analog Layout Engineer

Ciena Corporation • Ottawa

On-site
CAD 138,000 - 220,000
Medical plan
Dental plan
Vision plan
+5
Principal Analog Layout Engineer
Principal Analog Layout Engineer

Ciena • Ottawa

On-site
CAD 138,000 - 220,400
Medical, dental, and vision plans
Participation in 401(K) & DCPP with company matching
Employee Stock Purchase Program
+1