Principal Embedded Firmware & Systems Engineer — Remote

asteralabs; Toronto; Hybrid; CAD 120,000 - 160,000; Full time

Job summary

Astera Labs, located in Toronto/Ottawa with remote options, seeks a Principal Engineer for embedded firmware and software development. You will own the firmware stack from hardware abstraction to diagnostics, enabling adaptive equalization, tuning, and robust Ethernet interfaces across mixed-signal subsystems.

Travel to San Jose for chip bring-up may be required. This senior role collaborates across architecture, lab debug, automation, and customer deployment while mentoring engineers and

Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
• 8-12 years of experience developing embedded firmware or software for resource-constrained systems, with ownership from architecture through production.
• Strong embedded C/C++ skills and deep knowledge of microcontroller architecture, memory-mapped peripherals, interrupt handling, and bare-metal firmware.
• Hands-on experience with Ethernet or high-speed connectivity devices, including Layer 1 PHYs, SERDES, retimers, gearboxes, NICs, switches, or related systems.
• Solid understanding of physical-layer behavior, link state machines, register-level debug, and hardware/software integration.
• Experience with feedback systems, adaptive algorithms, calibration, or tuning of analog or mixed-signal subsystems.
• Proficiency with Microsoft-based development environments and Linux command-line tools, including GCC or Clang, Make, Bash, GDB, and Git.
• Clear written and verbal communication, systematic debugging skills, and the ability to

Responsibilities

• Own the embedded firmware stack from hardware abstraction and device drivers through management interfaces, diagnostics, and customer-facing APIs.
• Design firmware for adaptive equalization, gain control, calibration, link training, PLL/CDR feedback, thermal management, and device telemetry.
• Architect control algorithms, state machines, and tuning flows that manage analog and high-speed interfaces across process, voltage, and temperature variation.
• Define software quality gates, validation criteria, and release practices from pre-silicon planning through production deployment.
• Debug firmware behavior across Ethernet configurations, link states, and failure modes by tracing interactions among PHY, SERDES, FEC/PCS, MAC, retimer, and gearbox components.
• Investigate register accesses, embedded SDK behavior, link state machines, PHY telemetry, logs, and real-hardware measurements to identify root causes and deliver targeted fixes.
• Partner with system validation to develop test plans, automate characterization flows, and verify firmware across corner cases and product configurations.
• Support customer bring-up, field issue triage, and deployment readiness in collaboration with applications, platform, and silicon teams.
• Set technical direction, lead architecture and tradeoff discussions, and balance performance, code size, maintainability, and time to market.
• Serve as a technical authority for mixed-signal firmware, analog control behavior, Ethernet physical-layer debug, and hardware/software integration.
• Lead design reviews, implementation, code reviews, and difficult debug efforts across firmware, analog, silicon, systems, validation, and applications teams.
• Mentor engineers and help build the team through recruiting, onboarding, and technical development; people management or a senior technical-lead path may be available as the organization grows.

Skills

Embedded C/C++

Firmware architecture

Linux

GCC/Clang

Make

GDB

Git

Education

Bachelor's degree in CS/EE

Tools

GCC/Clang

Make

GDB

Git

Job description

Astera Labs, located in Toronto/Ottawa with remote options, seeks a Principal Engineer for embedded firmware and software development. You will own the firmware stack from hardware abstraction to diagnostics, enabling adaptive equalization, tuning, and robust Ethernet interfaces across mixed-signal subsystems.

Travel to San Jose for chip bring-up may be required. This senior role collaborates across architecture, lab debug, automation, and customer deployment while mentoring engineers and