Principal Analog/Mixed-Signal IC Design Architect

Astera Labs; Toronto; On-site; CAD 233,000 - 297,000; Full time

Benefits offered by this job

Discretionary bonus

Job summary

Astera Labs seeks a Principal Analog Mixed-Signal Design Engineer to architect and implement high-performance analog blocks for SerDes, PHY, and high-speed I/O. You will own designs from concept through silicon bring-up, setting the bar for the analog team and mentoring colleagues.

The role demands 8+ years in analog/mixed-signal IC design, strong SI knowledge, and hands-on proficiency with Cadence tools. You will work in a high-impact environment focused on AI connectivity in data centers.

Qualifications

• MS or PhD in Electrical Engineering or related field.
• 8+ years of analog/mixed-signal IC design experience.
• Proven track record designing high-speed analog circuits (PLLs, SerDes, data converters, references, regulators) in CMOS/FinFET nodes.
• Strong understanding of physical-layer design principles, signal integrity, and high-speed I/O.
• Proficiency with Cadence Virtuoso and simulation tools; layout/parasitic-aware design.

Responsibilities

• Architect and design high-speed analog/mixed-signal circuits for SerDes, PHY, and high-speed I/O.
• Lead design from concept through silicon bring-up; supervise layout and verification across PVT corners.
• Mentor engineers and set design methodologies; collaborate with digital, physical design, and systems teams.
• Define and execute test plans to correlate silicon performance with targets.
• Lead silicon bring-up, characterization, debugging, and design-for-test activities.

Skills

Analog design

Mixed-signal design

High-speed I/O

PLL design

SerDes basics

Cadence Virtuoso

Physical-layer

Education

MS/PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

Job description

Astera Labs seeks a Principal Analog Mixed-Signal Design Engineer to architect and implement high-performance analog blocks for SerDes, PHY, and high-speed I/O. You will own designs from concept through silicon bring-up, setting the bar for the analog team and mentoring colleagues.

The role demands 8+ years in analog/mixed-signal IC design, strong SI knowledge, and hands-on proficiency with Cadence tools. You will work in a high-impact environment focused on AI connectivity in data centers.